We demonstrate the presence of chaos in stochastic simulations that are widely used to study biodiversity in nature. The investigation deals with a set of three distinct species that evolve according to the standard rules of mobility, reproduction and predation, with predation following the cyclic rules of the popular rock, paper and scissors game. The study uncovers the possibility to distinguish between time evolutions that start from slightly different initial states, guided by the Hamming distance which heuristically unveils the chaotic behavior. The finding opens up a quantitative approach that relates the correlation length to the average density of maxima of a typical species, and an ensemble of stochastic simulations is implemented to support the procedure. The main result of the work shows how a single and simple experimental realization that counts the density of maxima associated with the chaotic evolution of the species serves to infer its correlation length. We use the result to investigate others distinct complex systems, one dealing with a set of differential equations that can be used to model a diversity of natural and artificial chaotic systems, and another one, focusing on the ocean water level.

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An innovative technique to model and simulate partial and dynamic reconfiguration is presented in this paper. Developed from modifications of the SystemC kernel, this technique can either be used at transaction level (TLM) or at register transfer level (RTL). At TLM it allows the modeling and simulation of higher-level hardware and embedded software, while at RTL the dynamic system behavior can be observed at signals level. The provided set of instructions promises a reduction in the design cycle. Compared with traditional strategies, information about dynamic and adaptive behavior will be available in an earlier stage,. An established application from the automotive domain is analyzed and illustrates the potential of the technique at TLM. The acquired results will assist in the choice of the best cost/benefit tradeoff regarding FPGA chip area.