In this paper a previously developed Line Width Roughness (LWR) analysis techniques 1 is used to characterize postlitho process LWR reduction methods in the frequency domain. Post-litho processes are likely to be required to reach the ITRS 3σLWR target for the 32nm and 22nm half pitch technological node. The aim of these lithographic processes is to mitigate the roughness of the resist and ultimately the etched patterns without a dramatic change in Critical Dimensions (CD). Various techniques are discussed: in-track chemical processes, ion beam sputtering, thermal and plasma treatments as dedicated etch-step. Each technique manifests a characteristic smoothing in the frequency domain 2,3 , reducing the LWR up to 35%. Exploiting LWR reduction at the different frequencies, and combining these techniques, our target is to determine whether 50% overall LWR reduction is feasible.
The reduction of line width roughness (LWR) is a critical issue in developing resist materials for EUV lithography and LWR represents a trade-off between sensitivity and resolution. Additional post pattern processing is expected as an LWR reduction technique without impact to resolution or sensitivity. This paper reports the LWR reducing effect of a postdevelopment resist-smoothing process. Approximately 20 % improvement in LWR for ArF immersion exposed resist patterns was achieved for two types of resist and two illumination conditions. The LWR after BARC etching in which resist-smoothing was applied was decreased relative to the case in which smoothing was not applied. Resist-smoothing process also reduced LWR of an EUV exposure resist pattern by approximately 10 %. These results confirm that resistsmoothing process is robust for different resists and illumination conditions.
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