The successive approximation register (SAR) analog-to-digital converter (ADC) is currently the most popular type of ADC architecture, owing to its power efficiency. They are also used in multichannel systems, where power efficiency is of high importance because of the large number of simultaneously working channels. However, the SAR ADC architecture is not the most area efficient. In SAR ADCs, the binary weighted capacitive digital-to-analog converter (DAC) is used, which means that one additional bit of resolution costs double the increase of area. Oversampling and noise shaping are methods that allow an increase in resolution without an increase of area. In this paper we present the new SAR ADC architectures with a noise shaping. A first-order noise transfer function (NTF) with zero located nearly at one can be achieved. We propose two modifications of the architecture: with zero-only NTF and with the NTF with additional pole. The additional pole theoretically increases the efficiency of noise shaping to further 3 dB. The architectures were applied to the design of SAR ADCs in a 65 nm complementary metal-oxide semiconductor (CMOS) with OSR equal to 10. A 6-bit capacitive DAC was used. The proposed architectures provide nearly 4 additional bits in ENOB. The equalent input bandwitdth is equal to 200 kHz with the sampling rate equal to 4 MS/s.
The phase shifting transformer in the electric power system (EPS) provides more efficient control of EPS modes by voltage and active power flow regulation. However, nowadays quasi-steady and transient processes in the EPS become more complicated. As a result, the commonly used simulation tools apply decomposition of EPS processes to quasi-steady and transient, simplification of mathematical models of EPS elements, limitation of the simulation time interval. Mentioned simplifications and limitations in general lead to an uncertain loss of completeness of EPS modeling. The concept of software and hardware tools of phase shifting transformer simulation, presented in the article, allows to solve this problem. The software and hardware of phase shifting transformer simulation are the tools of hybrid simulation, which include analog, digital, and physical approaches of the simulation. The analog approach is the solution of the differential equations system, describing the phase shifting transformer processes by continuous implicit integration. The digital approach provides the control of the electronic switches, the phase shifting transformer parameters, such as leakage inductance, active resistance etc. The physical approach is the connection and switching in the EPS elements as in real EPS. The article presents the all-mode thyristor-controlled phase shifting transformer model, developed by hybrid simulation approach and adapted for use in the Hybrid Real Time Power System Simulator developed in Tomsk polytechnic university. The appropriate research of phase shifting transformer in the EPS was carried out by Hybrid Real Time Power System Simulator, in which the Tomsk EPS (region of Russia where there is a problem of non-synchronous operation of the northern and southern parts) is implemented. By means of the Tomsk EPS model and developed phase shifting transformer model, the purpose of which was to interconnect two asynchronously operating parts of the Tomsk EPS and experimental research were carried out.
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