Silicon photonics has emerged as the leading candidate for implementing ultralow power wavelength–division–multiplexed communication networks in high-performance computers, yet current components (lasers, modulators, filters and detectors) consume too much power for the high-speed femtojoule-class links that ultimately will be required. Here we demonstrate and characterize the first modulator to achieve simultaneous high-speed (25 Gb s−1), low-voltage (0.5 VPP) and efficient 0.9 fJ per bit error-free operation. This low-energy high-speed operation is enabled by a record electro-optic response, obtained in a vertical p–n junction device that at 250 pm V−1 (30 GHz V−1) is up to 10 times larger than prior demonstrations. In addition, this record electro-optic response is used to compensate for thermal drift over a 7.5 °C temperature range with little additional energy consumption (0.24 fJ per bit for a total energy consumption below 1.03 J per bit). The combined results of highly efficient modulation and electro-optic thermal compensation represent a new paradigm in modulator development and a major step towards single-digit femtojoule-class communications.

We demonstrate here a spatially non-blocking optical 4x4 router with a footprint of 0.07 mm(2) for use in future integrated photonic interconnection networks. The device is dynamically switched using thermo-optically tuned silicon microring resonators with a wavelength shift to power ratio of 0.25nm/mW. The design can route four optical inputs to four outputs with individual bandwidths of up to 38.5 GHz. All tested configurations successfully routed a single-wavelength laser and provided a maximum extinction ratio larger than 20 dB.

No abstract

Abstract-Simultaneous all-optical switching of 20 continuouswave wavelength channels is achieved in a microring resonator-based silicon broadband 1 2 2 comb switch. Moreover, single-channel power penalty measurements are performed during active operation of the switch at both the through and the drop output ports. A statistical characterization of the drop-port insertion losses and extinction ratios of both ports shows broad spectral uniformity, and bit-error-rate measurements during passive operation indicate a negligible increase in signal degradation as the number of wavelength channels exiting the drop port are scaled from one to 16, with peak powers of 06 dBm per channel. A high-speed broadband switching device, such as the one described here, is a crucial element for the deployment of interconnection networks based on silicon photonic integrated circuits.

We experimentally demonstrate silicon ring resonators with internal quality factors of Q(0)=2.2×10(7), corresponding to record 2.7 dB/m propagation losses. Importantly, we show that these propagation losses are limited by bend loss, indicating that the propagation loss limit for silicon has not yet been reached.

No abstract

Abstract-Chip-scale photonic interconnection networks have emerged as a promising technology solution that can address many of the scalability challenges facing the communication networks in next-generation high-performance multicore processors. Photonic interconnects can offer significantly higher bandwidth density, lower latencies, and better energy efficiency. Even though photonics exhibits these inherent advantages over electronics, the network designs that can successfully leverage these benefits cannot be straightforwardly extracted from typical electronic network methodologies and must consider the many unique physical-layer constraints of optical technologies. We conduct an architectural exploration of four chip-scale photonic interconnection networks in a novel simulation environment, measuring insertion loss, crosstalk, and power. We also explain and demonstrate the impact of these physical-layer metrics on the scalability, performance, and realizability of each design.

No abstract