Spiking neural networks exploit spatiotemporal processing, spiking sparsity, and high interneuron bandwidth to maximize the energy efficiency of neuromorphic computing. While conventional silicon-based technology can be used in this context, the resulting neuronsynapse circuits require multiple transistors and complicated layouts that limit integration density. Here, we demonstrate unprecedented electrostatic control of dual-gated Gaussian heterojunction transistors for simplified spiking neuron implementation. These devices employ wafer-scale mixed-dimensional van der Waals heterojunctions consisting of chemical vapor deposited monolayer molybdenum disulfide and solution-processed semiconducting single-walled carbon nanotubes to emulate the spike-generating ion channels in biological neurons. Circuits based on these dual-gated Gaussian devices enable a variety of biological spiking responses including phasic spiking, delayed spiking, and tonic bursting. In addition to neuromorphic computing, the tunable Gaussian response has significant implications for a range of other applications including telecommunications, computer vision, and natural language processing.
Artificial intelligence and machine learning are growing computing paradigms, but current algorithms incur undesirable energy costs on conventional hardware platforms, thus motivating the exploration of more efficient neuromorphic architectures. Toward this end, we introduce here a memtransistor with gate-tunable dynamic learning behavior. By fabricating memtransistors from monolayer MoS 2 grown on sapphire, the relative importance of the vertical field effect from the gate is enhanced, thereby heightening reconfigurability of the device response. Inspired by biological systems, gate pulses are used to modulate potentiation and depression, resulting in diverse learning curves and simplified spike-timing-dependent plasticity that facilitate unsupervised learning in simulated spiking neural networks. This capability also enables continuous learning, which is a previously underexplored cognitive concept in neuromorphic computing. Overall, this work demonstrates that the reconfigurability of memtransistors provides unique hardware accelerator opportunities for energy efficient artificial intelligence and machine learning.
This work presents AEGIS, a novel mixed-signal framework for real-time anomaly detection by examining sensor stream statistics. AEGIS utilizes Kernel Density Estimation (KDE)-based non-parametric density estimation to generate a real-time statistical model of the sensor data stream. The likelihood estimate of the sensor data point can be obtained based on the generated statistical model to detect outliers. We present CMOS Gilbert Gaussian cell-based design to realize Gaussian kernels for KDE. For outlier detection, the decision boundary is defined in terms of kernel standard deviation (σ Kernel ) and likelihood threshold (P T hres ). We adopt a sliding window to update the detection model in real-time. We use time-series dataset provided from Yahoo to benchmark the performance of AEGIS. A f1-score higher than 0.87 is achieved by optimizing parameters such as length of the sliding window and decision thresholds which are programmable in AEGIS. Discussed architecture is designed using 45nm technology node and our approach on average consumes ∼75 µW power at a sampling rate of 2 MHz while using ten recent inlier samples for density estimation. Fullversion of this research has been published at IEEE TVLSI
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