The dissemination of metallic contamination occurring during wafer handling is of primary importance for the management of cross contamination issues. This work describes a protocol used to estimate the percentage of contamination transferred from a contaminated wafer to another one via contact on solid surfaces involved during handling. Results suggest that particles size is the most important parameter on the global cross contamination coefficient named K. For sub µm particles, the transfer is low, K ranging from 0 to 10%. Above a few µm, particles are very easily transferred from contaminated wafers to handling surfaces, with a coefficient K1 which can reach 100%. The decontamination of handling surfaces cycling clean wafers or using wet wipes has also been investigated. For situations leading to high K percentages, efficient and fast cleaning protocols can be applied. This work also discusses the interaction forces between particles and substrates to explain the observed tendencies.
Advanced Integrated Circuit (IC) manufacturing faces both the development of many products and the introduction of a large number of new materials, which represent possible risk of contamination. Therefore, the estimation of the dangerousness of metallic elements must be estimated by relevant short loops. The process steps used in the short loop should represent the production reality or should be performed in the most detrimental conditions. This study shows the impact of different short loop parameters on the dangerousness of metallic elements and their behaviour toward Si and SiO2: type of contamination (depending on the deposition method), thermal budget, oxidizing and non oxidizing atmosphere of the intra-diffusion step, metrology technics. This paper shows that the usual short loops fulfil the conditions of a relevant test. Accordingly, estimation of the dangerousness of the metallic elements can be used to determine detrimental thresholds in manufacturing areas.
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