Chaotic systems can yield a wide variety of patterns. Here we use this feature to generate all possible fundamental logic gate functions. This forms the basis of the design of a dynamical computing device, a chaogate, that can be rapidly morphed to become any desired logic gate. Here we review the basic concepts underlying this and present an extension of the formalism to include asymmetric logic functions.
Pulse coupled oscillators (PCOs) represent an ubiquitous model for a number of physical and biological systems. Phase response curves (PRCs) provide a general mathematical framework to analyze patterns of synchrony generated within these models. A general theoretical approach to account for the nonlinear contributions from higher-order PRCs in the generation of synchronous patterns by the PCOs is still lacking. Here, by considering a prototypical example of a PCO network, i.e., two synaptically coupled neurons, we present a general theory that extends beyond the weak-coupling approximation, to account for higher-order PRC corrections in the derivation of an approximate discrete map, the stable fixed point of which can predict the domain of 1:1 phase locked synchronous states generated by the PCO network.
By applying nonlinear dynamics to the dense storage of information, we demonstrate how a single nonlinear dynamical element can store M items, where M is variable and can be large. This provides the capability for naturally storing data in different bases or in different alphabets and can be used to implement multilevel logic. Further we show how this method of storing information can serve as a preprocessing tool for (exact or inexact) pattern matching searches. Since our scheme involves just a single procedural step, it is naturally set up for parallel implementation and can be realized with hardware currently employed for chaos-based computing architectures.
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