Abstract--From the controller design framework, a simple analytical model that captures the dominant behavior in the range of interest is the optimal. When modeling resonant circuits, complex mathematical models are obtained. These high-order models are not the most suitable for controller design. Although some assumptions can be made for simplifying these models, variable frequency operation or load uncertainty can make these premises no longer valid. In this work, a systematic modeling order reduction technique, Slowly Varying Amplitude and Phase (SVAP), is considered for obtaining simpler analytical models of resonant inverters. SVAP gives identical results as the classical model-order residualization technique from automatic control theory. A slight modification of SVAP, Slowly Varying Amplitude Derivative and Phase (SVADP) is applied in this paper to obtain a better validity range. SVADP is validated for a half-bridge series resonant inverter (HBSRI) and for a highorder plant, a dual-half bridge series resonant inverter (DHBSRI) giving analytical second-order transfer functions for both topologies. Simulation and experimental results are provided to show the validity range of the reduced-order models.

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The state-of-the-art of induction heating technology requires more and more multivariable control systems able to provide a suitable response for a wide set of vessels to be heated. The goal of this paper is to propose a small signal model of a multivariable system, a dual half-bridge series resonant inverter sharing a common resonant capacitor. A Phase Shift Square Wave Modulation (PSSWM) is considered to control the output power of two induction heating loads where the switching frequency and the phase shift are the control inputs. Thus, the topology to be controlled is a Two-Input-Two-Output (TITO) system that presents significant interactions between the inputs and the outputs. A transfer function matrix based on the harmonic balance approach is proposed and validated in simulation. Moreover, stability, output controllability and performance limitations are analyzed highlighting the control problems that arise in this particular application.

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SUMMARYThe on-chip automatic tuning of digitally programmable continuous-time G m -C filters with a wide operation range employing a hybrid analog-digital master-slave scheme is reported in this work. The master system is implemented with a voltage-controlled filter (VCF) with the same programmable transconductance cells as the main filter to enhance the matching between master and slave. The frequency tuning method, for both analog and digital control, is based on a digital phase comparator included in the phase-locked loop achieving high-precision tunability. The digital frequency tuning is obtained with an error of ±4% and the maximum settling time when changing between two consecutive digital words is 0.3 s. Once the digital word is fixed, the analog tuning finely adjusts the value of the characteristic frequency to the reference and corrects for possible temperature variations with a settling time of 0.2 s. The analog frequency control covers the whole discrete step with a maximum error of ±5%. Furthermore, a magnitude-locked loop (MLL) Q-tuning block is simultaneously applied to the system in order to precisely control the quality factor of the G m -C filter by using an appropriate envelope detector. According to the obtained results, both post-layout simulation and experimental results, the adopted scheme has resulted as a useful and adequate solution to implement the complete auto-tuning system of digitally programmable continuous-time filters, including frequency and Q-control.

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