The paper proposes a novel approach in an attempt to solve the test problem for sequential circuits. Up until I / IntroductionDuring the past decade much academic work has been done in an attempt to solve the problem of Automatic Test Pattern Generation (ATPG) for sequential circuits [Mar86,Che88a,Che88b,MaD88,Gou91,Lee91,Nie91,Ono91,Kel93]. More recently several industrial tools (HITEC, GENTEST, ...) have been developed for inclusion in CAD suites. Two main techniques are classically used to generate test vectors for circuits, namely, the deterministic approach and the simulation-based approach. The simulation-based approach may use either random or genetic [Saa94, Pri94, Rud95] generation. In some cases both techniques are found to be combined in the same tool, in others they are separated.It seems that no single technique gives the best results for all the test cases. Taking this fact into account, we decided to develop a new Sequential-ATPG, the so-called MOSAIC tool, which aims at being able to cope with industrial circuits. The designs targeted are real designs, which may or may not be provided with partial scan. This means that some sequential elements are not included in scan chains. In addition to this, depending on the circuit under consideration, the sequential elements (FFs) may or may not be provided with reset facilities. Normally, an initialization sequence is given by the designer to set the circuit into its reset state, but there are some exceptions that we have to deal with. As a consequence we do not assume a reset state for these sequential elements.The fundamental concepts on which our approach is based originates mainly from the basic works of Fujiwara and Shimono [Fuj83] on the FAN algorithm and Gouder and Kaibel [Gou91] on the CONSEQUENT model. Different strategies we have used are derived from various papers : [Che88a, Sch88, Sch89, Nie91, Lee91, Ono91, Kel93]. Section II describes the techniques commonly used in test generation and explains the way we have modified these techniques in MOSAIC. Section III exposes our implementation of the Multiple Strategy technique derived from [Min89], and Section IV describes our approach for sequential circuits. Section V discusses Strategy choices, then, Section VI presents the MOSAIC results obtained on ISCAS89 benchmark circuits. Lastly, Section VII gives conclusions and proposes some future extensions. II / Basic TechniquesThe various techniques presented in this section are not limited to combinational circuits. They are used with the iterative array representation of sequ. circuits [Abr90]. II.1 / Value system
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