No abstract

No abstract

CMOS supply voltage scaling for temperature independent gate delay is investigated. It is found that the optimum supply voltage which result in temperature insensitive operation is proportional to the threshold voltage. This voltage enables a single battery cell operation. CMOS technologies with 0.35-and 0.25-m size features are used as examples in this study.

No abstract

No abstract

No abstract

Texas Instruments, Dallas, TXThe rapid advance of CMOS technology has been a driving force for more integration of wireless receivers. Reducing the receiver analog circuit complexity and replacing analog signal processing with digital signal processing is needed to achieve maximum utilization of digital programmability. A key component to achieve this goal is the design of a low-NF and high-DR analog-to-digital converter (ADC). A low NF and high DR relax the requirements for signal amplification and filtering before the ADC and thus enable it to be placed closer to the antenna. This paper presents the design of a continuous-time (CT) ∆Σ modulator for wireless communication applications. The key features of this modulator include low-noise performance (9nv/√Hz), high dynamic-range, digital compensation of excess loop delay, and saturation detection with gain switching capability.

No abstract