The paper outlines the use of the extrinsic evolvable hardware approach to evolve finite state machines (FSM). Both the genetic algorithm (GA) and Evolvable Hardware (EHW) are combined together to produce optimal logic circuit. GA is used to optimise the state assignment problem. EHW is used to design the combinational parts of the desired circuit. The approach is tested on a number of finite state machines from MCNC benchmark set. These circuits have been evolved using different functional sets of logic gates and GA parameters. The results show promise for the use of this approach as a design method for sequential logic circuits.
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