μ-Raman Validated Stress-Enhanced Mobility in XtreMOS Transistors

Moens, P.; Roig, J.; Meersman, J.; Baele, J.; Desoete, B.; Tack, M.; Wolf, Ingrid De

doi:10.1109/ispsd.2008.4538903

Cited by 3 publications

(4 citation statements)

References 9 publications

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“…The narrow mesa structure increases the maximum mechanical stress σ xmax in the drift region. In the previous work, 17) it was estimated that the threshold silicon stress to cause a lot of crystal defects by cracking is about 500 MPa. Therefore, it can be expected that the device will be cracked at the t ox of 0.6 μm and the W of 0.4 μm and the other design points can be employed without the device destruction risk.…”

Section: Simulation Results and Discussionmentioning

confidence: 99%

“…[2][3][4][5][6][7][8][9][10][11][12][13][14][15] In addition, mobility enhancement by mechanical stress has been demonstrated to reduce the on-resistance in the FP power MOSFET. [16][17][18][19] Although the design for R on A reduction has been studied, 20) it is not clear whether the same design direction improves the FOM including the switching characteristics and the design parameter optimization has a potential for further FOM improvement. Q sw is mainly for the gate-drain capacitance C gd charging and proportional to the switching loss.…”

Section: Introductionmentioning

confidence: 99%

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A design direction of low-voltage field-plate power MOSFETs for figure-of-merit (FOM) limit

Ogawa¹,

Saito²,

Nishizawa³

2021

Jpn. J. Appl. Phys.

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The design direction of low voltage field-plate (FP) power MOSFETs was studied toward the figure-of-merit (FOM) limit by TCAD simulation. The FOMs of R on Q g, R on Q sw, and R on Q oss are considering the on-resistance and the charge required for the switching to evaluate the conduction loss and the switching loss. The results show that thin oxide and narrow mesa structure is desired for minimizing on-resistance R on A and opposite design of thick oxide and wide mesa structure is a good choice to reduce R on Q sw for high switching frequency application. In addition, the potential of R on A and R on Q sw reduction is maintained, however, it is difficult to reduce the R on Q g and R on Q oss by the design parameter optimization. It is verified that power loss reduction in whole operating condition cannot be achieved only by the design parameter optimization and requires approach from the other direction.

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Section: Simulation Results and Discussionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

A design direction of low-voltage field-plate power MOSFETs for figure-of-merit (FOM) limit

Ogawa¹,

Saito²,

Nishizawa³

2021

Jpn. J. Appl. Phys.

View full text Add to dashboard Cite

show abstract

“…The stress induced electron mobility enhancement was taken into account for the RonA simulation. In the previous work [10], it was estimated that the threshold silicon stress to cause a lot of crystal defects by cracking is about 500 MPa. Three devices were designed with the maximum mechanical stress within the threshold silicon stress in this work.…”

Section: Device Structure and Optimization Stepsmentioning

confidence: 99%

“…Recently, Field-Plate (FP) structure has been employed for the FOMs reduction of low-voltage power MOSFETs. The FP structure is effective to reduce the RonA by the increase of drift layer doping concentration due to charge compensate concept and stress induced electron mobility enhancement [2]- [10]. In addition, the RonQsw can be reduced by small Cgd due to the shield effect of FP electrode.…”

Section: Introductionmentioning

confidence: 99%