Winner-Takes-All Neural Network Based on 3D NAND Flash With 1-Bit Erase Scheme

Zhou, Wen; Jin, Lei; Jia, Jianquan; You, Kaikai; Jian-guo, Han; Jia, Xinlei; Yuan, Jing; Liu, Hongtao; Zhang, An; Ye, Tianchun; Huo, Zongliang

doi:10.1109/led.2023.3262962

Cited by 2 publications

(3 citation statements)

References 10 publications

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“…The SOM neural network is experimentally demonstrated on charge-trapping 3D NAND flash mini-array test structure. More device details are described in our previous works [9] [12] [13]. Customized waveform and algorithms for SOM are developed on Keysight B1500A semiconductor device analyzer.…”

Section: Device and Experimentsmentioning

confidence: 99%

“…2(d) and (e) shows the detailed corresponding schematic waveforms concurrently. Previous research has demonstrated that using soft erase operations with gradient bias to the dummy WL can inhibit unintended erase and reduce disturbance [13]. And the entire read operation of WL in the same row is performed within a single time step, so the latency of SOM is the read latency of 3D NAND and does not scale with the size of the array.…”

Section: B Implementing Ed Calculation With 3d Nand Device Arraymentioning

confidence: 99%

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Self-Organizing Mapping Neural Network Implementation Based on 3-D NAND Flash for Competitive Learning

Zhu,

Jin,

Zhou

et al. 2024

IEEE J. Electron Devices Soc.

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Self-organizing Map (SOM) neural network is a prominent algorithm in unsupervised machine learning, which is widely used for data clustering, high-dimensional visualization, and feature extraction. However, the hardware implementation of SOM is limited by the von Neumann bottleneck. Herein, a SOM neural network is implemented by the combination of 3D NAND flash memory arrays and in-memory Euclidean distance (ED) calculation. The weights in the SOM network are mapped to the conductance of the 3D NAND differential pair. It is experimentally demonstrated that the differential pair in 3D NAND flash array possesses superior characteristics for neuromorphic computing during increasing and decreasing synaptic weight. Using the 3D NAND-based SOM, a competitive learning neural network is established and used for the unsupervised classification of a set of Gaussian distribution data points. The experimental results illustrate the excellent performance and efficiency of the proposed architecture, highlighting the potential of 3D NAND-based in-memory computing for artificial intelligence applications.

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Section: Device and Experimentsmentioning

confidence: 99%

Section: B Implementing Ed Calculation With 3d Nand Device Arraymentioning

confidence: 99%

Self-Organizing Mapping Neural Network Implementation Based on 3-D NAND Flash for Competitive Learning

Zhu,

Jin,

Zhou

et al. 2024

IEEE J. Electron Devices Soc.

Self Cite

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“…To enhance the layout efficiency of the synapses, a 3D vertical NAND (3D VNAND) structure can be applied. [49,50] It should be noted that the peri-under-cell (PUC) or cell-on-peri (COP) structure used in 3D VNAND, where their cells are fabricated on the peripheral circuits using monolithic 3D integration, is similar to our 3D neuromorphic hardware. [51]…”

Section: Coupled Characteristics Of Superjacent 1tft-synapses and Und...mentioning

confidence: 99%

3D Neuromorphic Hardware with Single Thin‐Film Transistor Synapses Over Single Thin‐Body Transistor Neurons by Monolithic Vertical Integration

Han,

Lee,

Kim

et al. 2023

Advanced Science

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Neuromorphic hardware with a spiking neural network (SNN) can significantly enhance the energy efficiency for artificial intelligence (AI) functions owing to its event‐driven and spatiotemporally sparse operations. However, an artificial neuron and synapse based on complex complementary metal‐oxide‐semiconductor (CMOS) circuits limit the scalability and energy efficiency of neuromorphic hardware. In this work, a neuromorphic module is demonstrated composed of synapses over neurons realized by monolithic vertical integration. The synapse at top is a single thin‐film transistor (1TFT‐synapse) made of poly‐crystalline silicon film and the neuron at bottom is another single transistor (1T‐neuron) made of single‐crystalline silicon. Excimer laser annealing (ELA) is applied to activate dopants for the 1TFT‐synapse at the top and rapid thermal annealing (RTA) is applied to do so for the 1T‐neuron at the bottom. Internal electro‐thermal annealing (ETA) via the generation of Joule heat is also used to enhance the endurance of the 1TFT‐synapse without transferring heat to the 1T‐neuron at the bottom. As neuromorphic vision sensing, classification of American Sign Language (ASL) is conducted with the fabricated neuromorphic module. Its classification accuracy on ASL is ≈92.3% even after 204 800 update pulses.

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Winner-Takes-All Neural Network Based on 3D NAND Flash With 1-Bit Erase Scheme

Cited by 2 publications

References 10 publications

Self-Organizing Mapping Neural Network Implementation Based on 3-D NAND Flash for Competitive Learning

Self-Organizing Mapping Neural Network Implementation Based on 3-D NAND Flash for Competitive Learning

3D Neuromorphic Hardware with Single Thin‐Film Transistor Synapses Over Single Thin‐Body Transistor Neurons by Monolithic Vertical Integration

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