Wideband Low Noise Variable Gain Amplifier

Baumgratz, Filipe D.; Li, Hao; Bampi, Sérgio; Saavedra, Carlos E.

doi:10.1145/2800986.2801029

Cited by 6 publications

(1 citation statement)

References 8 publications

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“…1b presents the block diagram of the VVA. The active baluns, A and B, split the input signal into two out-ofphase signals, then those are added at the output terminal so that they cancel each other [2,9]. By fully turning on both baluns, the output signals completely cancel each other, achieving the minimum gain.…”

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confidence: 99%

A 0.4–3.3 GHz low-noise variable gain amplifier with 35 dB tuning range, 4.9 dB NF, and 40 dBm IIP2

Baumgratz

Tavernier

et al. 2017

Analog Integr Circ Sig Process

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This work presents a low-noise variable gain amplifier (LNVGA) in which the IIP2 is very high, and the gain control is applied to improve the system dynamic range, even with the limitations of the CMOS technology. Two stages compose the LNVGA, a low-noise amplifier (LNA), that keeps the noise figure (NF) at low values, and a variable voltage attenuator (VVA), that provides the gain variation. We have applied on the VVA the phase cancellation technique, in which the addition of two out-of-phase signals controls the gain. This technique provides a large gain tuning range only if the paths of the two signalsto be added are well balanced; hence, a precise 180 degrees phase difference is required. In this desing we propose an active balun with small imbalance, which creates those signals. The LNVGA was implemented in 130 nm CMOS with a 1.2 V supply. The measurement results show a 35 dB gain tuning range, varying from 10 to -25 dB, a 4.9 dB minimum NF, a -10 dBm IIP3, and an IIP2 as high as +40 dBm.

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Section: Lnamentioning

confidence: 99%

A 0.4–3.3 GHz low-noise variable gain amplifier with 35 dB tuning range, 4.9 dB NF, and 40 dBm IIP2

Baumgratz

Tavernier

et al. 2017

Analog Integr Circ Sig Process

Self Cite

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A 4.5–7.5 GHz highly integrated transceiver front‐end for UWB application

2022

Micro & Optical Tech Letters

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In this letter, a 4.5-7.5 GHz highly integrated transceiver front-end, incorporating two single-pole three-throw (SP3T) transmit/receive (T/R) switches, a low-noise amplifier (LNA), a power amplifier (PA), and a bypass path for UWB positioning and communication systems applications, is reported. The mode switches among transmitting, receiving, and bypass are achieved by utilizing two control voltages through integrating a 2-4 decoder. Meanwhile, to ensure low-power dissipation in different modes, the LNA and PA work in different modes (enable or disable) for transmitting and receiving status while both the LNA and PA are disabled for bypass mode. Fabricated by using 0.5-μm GaAs pHEMT process, the presented FEM achieves 20-dB gain, and 2.5-dB typical noise figure for receiving mode, 8-dB gain, and 16-dBm OP1dB for transmitting mode, and 1.8 dB insertion loss for bypass mode, with a compact chip area of 1.5 mm × 1.7 mm. To the best of authors' knowledge, the presented circuits are the highest integrated and smallest chip area transceiver front-end for UWB application among all previously reported UWB-related RF front-end chips.

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Design and Optimization of Wideband Microwave Amplifier Using Nonlinear Technique

Tamilchelvan¹,

Senthilkumar

2018

Wireless Pers Commun

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Wideband Low Noise Variable Gain Amplifier

Cited by 6 publications

References 8 publications

A 0.4–3.3 GHz low-noise variable gain amplifier with 35 dB tuning range, 4.9 dB NF, and 40 dBm IIP2

A 0.4–3.3 GHz low-noise variable gain amplifier with 35 dB tuning range, 4.9 dB NF, and 40 dBm IIP2

A 4.5–7.5 GHz highly integrated transceiver front‐end for UWB application

Design and Optimization of Wideband Microwave Amplifier Using Nonlinear Technique

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