Wideband Inductorless True Time Delay Cell Based on CMOS Inverter for Timed Array Receivers

Yarahmadi, Ahmad; Jannesari, Abumoslem

doi:10.1007/s00034-021-01656-2

Cited by 2 publications

(20 citation statements)

References 16 publications

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“…[17] to propose a PVT resilient delay value of 50 pS. Handy calculations for sizing the cell's elements are based on [17]. In this paper, the power budget is set to 20 mW.…”

Section: Simulation Resultsmentioning

confidence: 99%

“…So, the comparison table (Table 3) shows the essential features of the state‐of‐the‐art TTD cells. A FOM from [17] is calculated for each of them to have a fair comparison:

\mathrm{F}\mathrm{O}\mathrm{M}=\frac{{(L)\vert }_{[\mathrm{l}\mathrm{i}\mathrm{n}]}\ast {(\mathrm{I}\mathrm{I}\mathrm{P}3)\vert }_{[\mathrm{m}\mathrm{W}]}\ast {(\mathrm{B}\mathrm{W})\vert }_{[\mathrm{G}\mathrm{H}\mathrm{z}]}}{{[{(F)\vert }_{[\mathrm{l}\mathrm{i}\mathrm{n}]}-1]\ast ({P}_{\mathrm{d}\mathrm{c}})\vert }_{[\mathrm{m}\mathrm{W}]}{\ast (1)\vert }_{[\mathrm{G}\mathrm{H}\mathrm{z}]}}\ast \frac{{(T)\vert }_{[\mathrm{p}\mathrm{S}]}}{{(A)\vert }_{[\mathrm{m}{\mathrm{m}}^{2}]}}\ast {10}^{-\tfrac{{({\Delta }T)\vert }_{[\mathrm{p}\mathrm{S}]}}{{(T)\vert }_{[\mathrm{p}\mathrm{S}]}}}

…”

Section: Simulation Resultsmentioning

confidence: 99%

“…This paper redesigned the TTD cell in Ref. [17] to propose a PVT resilient delay value of 50 pS. Handy calculations for sizing the cell's elements are based on [17].…”

Section: Simulation Resultsmentioning

confidence: 99%

“…So, the comparison table (Table 3) shows the essential features of the state-of-the-art TTD cells. A FOM from [17] is calculated for each of them to have a fair comparison:…”

Section: Simulation Resultsmentioning

confidence: 99%

“…To address this issue and have an active TTD cell with flat delay bandwidth, a novel inductor‐less active TTD cell based on a CMOS inverter is presented in Ref. [17] for 1–5 GHz applications. The inverter‐based TTD cell provides a delay amount of 10 ps with flat delay bandwidth (3% DV in the whole frequency band).…”

Section: Introductionmentioning

confidence: 99%

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A PVT resilient true‐time delay cell

Yarahmadi

Jannesari

2023

IET Circuits, Devices & Syst

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A true-time delay (TTD) cell in TSMC 0.18 μm CMOS technology for 1-5 GHz applications is presented. Process variations, ageing effects, field variations, and other non-idealities have some impacts on the TTD cell's devices. One of the vulnerable specifications of TTD cells is their delay variation. While the TTD cell works in a delay line, the cell must have a constant and robust delay in the frequency band. For this matter, the body bias technique is presented and applied to the inductor-less TTD cell. With this technique, the threshold voltage can be manipulated intentionally. So, any variation in this voltage can be compensated with the body biasing of transistors. The simulation results show the TTD cell's robust performance against non-idealities, while delay variation improves more than 3� times in the frequency band of interest. This TTD cell provides a 50.95 pS delay with only 2% variation, while S 11 and S 22 parameters are lower than −10 dB in the 1-5 GHz frequency band. IIP3 of the TTD cell is about 2.7 dBm, and the power consumption is 20.5 mW. K E Y W O R D Sall-pass filter, active filters, analogue integrated circuits, CMOS analogue integrated circuits, continuous time systems, integrated circuit design, low-power electronics, radio frequency filters, Timed array system, True-Time-Delay cellThis is an open access article under the terms of the Creative Commons Attribution-NonCommercial-NoDerivs License, which permits use and distribution in any medium, provided the original work is properly cited, the use is non-commercial and no modifications or adaptations are made.

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“…[17] to propose a PVT resilient delay value of 50 pS. Handy calculations for sizing the cell's elements are based on [17]. In this paper, the power budget is set to 20 mW.…”

Section: Simulation Resultsmentioning

confidence: 99%

“…So, the comparison table (Table 3) shows the essential features of the state‐of‐the‐art TTD cells. A FOM from [17] is calculated for each of them to have a fair comparison:

\mathrm{F}\mathrm{O}\mathrm{M}=\frac{{(L)\vert }_{[\mathrm{l}\mathrm{i}\mathrm{n}]}\ast {(\mathrm{I}\mathrm{I}\mathrm{P}3)\vert }_{[\mathrm{m}\mathrm{W}]}\ast {(\mathrm{B}\mathrm{W})\vert }_{[\mathrm{G}\mathrm{H}\mathrm{z}]}}{{[{(F)\vert }_{[\mathrm{l}\mathrm{i}\mathrm{n}]}-1]\ast ({P}_{\mathrm{d}\mathrm{c}})\vert }_{[\mathrm{m}\mathrm{W}]}{\ast (1)\vert }_{[\mathrm{G}\mathrm{H}\mathrm{z}]}}\ast \frac{{(T)\vert }_{[\mathrm{p}\mathrm{S}]}}{{(A)\vert }_{[\mathrm{m}{\mathrm{m}}^{2}]}}\ast {10}^{-\tfrac{{({\Delta }T)\vert }_{[\mathrm{p}\mathrm{S}]}}{{(T)\vert }_{[\mathrm{p}\mathrm{S}]}}}

…”

Section: Simulation Resultsmentioning

confidence: 99%

“…This paper redesigned the TTD cell in Ref. [17] to propose a PVT resilient delay value of 50 pS. Handy calculations for sizing the cell's elements are based on [17].…”

Section: Simulation Resultsmentioning

confidence: 99%

“…So, the comparison table (Table 3) shows the essential features of the state-of-the-art TTD cells. A FOM from [17] is calculated for each of them to have a fair comparison:…”

Section: Simulation Resultsmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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A PVT resilient true‐time delay cell

Yarahmadi

Jannesari

2023

IET Circuits, Devices & Syst

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Wideband True Time Delay Cells

Yarahmadi¹

2023

UWB Technology - New Insights and Developments

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True-time delay (TTD) cells are used in timed array receivers for wideband multi-antenna topologies. TTD cells are divided into two major categories: silicon-based and non-silicon-based structures. Non-silicon-based structures have very good bandwidth but are bulky in the below 10 GHz frequency band. Silicon-based TTD cells are much more compact and better candidates for integrated circuit (IC) design. Passive and active approaches are the two ways to have a silicon-based TTD cell. Passive TTD cells are built by transmission lines (TL), artificial transmission lines (ATL), and LC ladder networks. Their power consumption is very low, and the delay bandwidth is good, but they are still bulky at low frequencies like below 5 GHz applications. Active all-pass filters as TTD cells are presented for these issues. In this chapter, we will discuss the challenges of inductor-based TTD cells. Then, inductor-less TTD cells are presented to address some of the previous structure’s issues. Finally, we will talk about these structures’ challenges as well. Then, the nonidealities effects on the TTD cell’s performance are investigated, and the body bias technique is presented to address these issues.

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Wideband Inductorless True Time Delay Cell Based on CMOS Inverter for Timed Array Receivers

Cited by 2 publications

References 16 publications

A PVT resilient true‐time delay cell

A PVT resilient true‐time delay cell

Wideband True Time Delay Cells

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