Wide frequency band scalable modeling of 3D embedded decoupling capacitors

Jacquinot, H.; Denis, D.

doi:10.1109/cde.2013.6481337

Cited by 2 publications

(4 citation statements)

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“…1). An interesting outcome is that the inductive contribution of the capacitor results mainly from the top metal electrode [1]. The extracted value of the inductive part of the capacitor excluding the top electrode contribution is quasi-null as shown in figure 8.…”

Section: Rf Extractionsmentioning

confidence: 93%

“…The main reasons are that 3D trench capacitors, as shown in figure 2, provide outstanding density integration performances using the third dimension of the silicon substrate and remarkable efficiency due to the location proximity and layout flexibility inside the circuit, as compared to external components [1], [2], [3], [4]. The development of integrated decoupling capacitor comes from the continuous increasing need of miniaturization and also from new space constrained environment applications, such as medical embedded applications.…”

Section: Figure 1 Schematic Of An Interposermentioning

confidence: 99%

“…However, the 2-port extraction procedure has the advantage to discriminate directly the embedded part of the capacitor from its interconnections. On the contrary, in a 1-port configuration, additional test structures are needed to be added to extract the contribution of interconnections [1].…”

Section: Characterization and De-embedding Proceduresmentioning

confidence: 99%

“…Those effects are typically parasitic capacitive coupling and substrate crosstalk. In this purpose, a 1-port methodology has been added to a classical 2-port methodology [1]. RF on-wafer measurements are performed using a 300 kHz-20 GHz Vector Network Analyzer.…”

Section: Characterization and De-embedding Proceduresmentioning

confidence: 99%

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Characterization, modeling and optimization of 3D embedded trench decoupling capacitors in Si-RF interposer

Jacquinot

Denis²

2013

2013 IEEE 63rd Electronic Components and Technology Conference

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Integrated trench high density MIS (Metal Insulator Semiconductor) capacitors in Si-interposer are of great interest as they provide decoupling in a smart way using the third dimension of the silicon substrate. However, the use of various highly integrated passive components on the same Siinterposer is challenging regarding wide frequency band performances and signal integrity. Both aspects are addressed in this paper based on 300 kHz-20 GHz vector network analyzer measurements on 3D 80 nF/mm 2 decoupling capacitors produced by IPDIA on a high resistivity substrate. Firstly, a scalable 1 MHz-10 GHz wideband model of a 3D capacitor in the 100 pF-10 nF range is developed. Secondly, 3D electromagnetic simulations of substrate and capacitive coupling between 3D capacitors using guard ring are presented. All simulations show good agreement with measurements. To the best of our knowledge, this is the first time that a wideband mathematical model as well as an RF crosstalk study have been published on embedded trench decoupling capacitors. IntroductionThe benefits of having a close proximity between potential noise sources and decoupling capacitors are well known. High density integrated decoupling capacitors are very promising components for the requirements of low crosstalk and signals coupling levels in mixed-circuit and high density 3D interposer applications as illustrated in figure 1.

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Section: Rf Extractionsmentioning

confidence: 93%