Weighted-Sum Operation of Three-Terminal Synapse Transistors in Array Configuration Using Spin-Coated Li-Doped ZrO₂ Electrolyte Gate Insulator

Abstract

Artificial synapses with ideal functionalities are essential in hardware neural networks to allow for energy-efficient analog computing. Electrolyte-gated transistors (EGTs) are promising candidates for artificial synaptic devices due to their low voltage operations supported by large specific capacitances of electrolyte gate insulators (EGIs). We investigated the synapse transistor employing an In–Ga–Zn–O channel and a Li-doped ZrO2 (LZO) EGI so as to improve the short-term plasticity (STP) and long-term potentiation (LTP). The LZO EGIs showed distinct differences in characteristics depending on the Li doping concentration, and we adopted the optimum doping concentration of 10%. Based on the strong electric double layer effect secured from the LZO, we successfully demonstrated excellent synaptic operations with gradual modulations of excitatory synaptic plasticity with variations in amplitude, width, and number of applied pulse spikes. The introduction of the LZO EGI was verified to improve typical short-term plasticity such as paired-pulse facilitation. Furthermore, by minutely controlling the pulse spike conditions, the conversion to LTP from STP was clearly accomplished while implementing the anti-Hebbian spike timing-dependent plasticity. Finally, the array configuration of synaptic devices, which is essential for realizing neuromorphic computing, was also demonstrated. In a 3 × 3 array architecture, the weighted-sum operation was well emulated to assign multilevels in seven states with the pulse width modulation scheme.