WCET-Aware Function-Level Dynamic Code Management on Scratchpad Memory

Abstract

Scratchpad memory (SPM) is a promising on-chip memory choice in real-time and cyber-physical systems where timing is of the utmost importance. SPM has time-predictable characteristics since its data movement between the SPM and the main memory is entirely managed by software. One way of such management is dynamic management. In dynamic management of instruction SPMs, code blocks are dynamically copied from the main memory to the SPM at runtime by executing direct memory access (DMA) instructions. Code management techniques try to minimize the overhead of DMA operations by finding an allocation scheme that leads to efficient utilization. In this article, we present three function-level code management techniques. These techniques perform allocation at the granularity of functions, with the objective of minimizing the impact of DMA overhead to the worst-case execution time (WCET) of a given program. The first technique finds an optimal mapping of each function to a region using integer linear programming (ILP), whereas the second technique is a polynomial-time heuristic that is suboptimal. The third technique maps functions directly to SPM addresses, not using regions, which can further reduce the WCET. Based on ILP, it can also find an optimal mapping. We evaluate our techniques using the Mälardalen WCET suite, MiBench suite, and proprietary automotive applications from industry. The results show that our techniques can significantly reduce the WCET estimates compared to caches with the state-of-the-art cache analysis.

Real-time Task Allocation Based on Variable Scratchpad Memory

“…The source tracing process of the MB algorithm is mainly as follows. First, we can know the number of MLCs when the SLC is a specific value through the constraint equation (1). Then according to the matrix , the task with the lowest energy consumption under the corresponding number of SLC and MLC can be obtained.…”

“…The main advantages of SRAM are its extremely high read-write performance and long life of 10 8 . So it is usually used to replace the traditional cache [1]. However, SRAM also faces the problems of insufficient storage density and excessive static leakage power consumption.…”

A Brief Overview of the KTA WCET Tool

“…The worst-case execution time (WCET) problem [25,30] is an important research area within the context of real-time systems. There exist many tools and techniques for static WCET analyis [2,6,11,13,18,19], for measurement-based and probabilistic approaches [3,9], and alternative approaches that are based on simplified hardware [1,15,16,24,26,27,31]. Recent work also targets the challenging problem of multicore WCET analysis [5,14,20,22,23,29].…”