Wavelength-Routed Optical NoCs: Design and EDA — State of the Art and Future Directions: Invited Paper

Tseng, Tsun-Ming; Truppel, Alexandre; Li, Mengchu; Nikdast, Mahdi; Schlichtmann, Ulf

doi:10.1109/iccad45719.2019.8942092

Cited by 12 publications

(7 citation statements)

References 30 publications

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“…Architecture of ONoC consists of three blocks [17], [18] as shown in Figure 1: i) transmitter, input from the generic NoC protocol converter is converted into optical signal in the transmitter. The main components in the transmitter are directly modulated laser source, driver circuit and demultiplexers; ii) wavelength router, router comprises of 2 nd order 2×2 micro resonator for routing the information between system on chip components; and iii) receiver, the receiver converts optical signal in to an electrical signal.…”

Section: Methodsmentioning

confidence: 99%

Optical network on chip: design of wavelength routed optical ring architecture

Kavitha

Maheswaran²,

Maheswaran³

et al. 2023

Bulletin EEI

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Network on chip (NoC) technology has now achieved a mature stage of development as a result of their use as a key component in many successful commercial devices. As multiprocessors continue to scale, these ship based electronic networks are more challenging to meet their power budget communication requirements. Innovative technology is emerging with the aim of offering shorter latencies and greater bandwidth with lower power consumption. Ring topology provides superior results among the all wavelength routed topologies in the chip optical network. In this paper, we proposed an optical ring network-on-chip (ORNoC) architecture which is contention free. Communication matrix is used to assign a single waveguide/wavelength pair to implement simultaneous communications. The design constraints for the proposed architecture will be wavelength reused on a single waveguide for multiple communications. We imply automatic wavelength/waveguide assignment for effective design and will prove that the proposed architecture can connect more number of nodes and less wavelengths per waveguide.

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Section: Methodsmentioning

confidence: 99%

Optical network on chip: design of wavelength routed optical ring architecture

Kavitha

Maheswaran²,

Maheswaran³

et al. 2023

Bulletin EEI

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“…Three-dimensional integrated circuits (3D ICs) using through silicon vias (TSVs) are widely considered a practical platform for WRONoCs [21], [22]. A typical setting of the 3D architecture consists of an optical layer stacked on top of an electronic layer, such as the processor-memory network shown in Fig.…”

Section: Background a Environmental Settingmentioning

confidence: 99%

ToPro: A Topology Projector and Waveguide Router for Wavelength-Routed Optical Networks-on-Chip

Zheng

Tseng

et al. 2021

2021 IEEE/ACM International Conference on Computer Aided Design (ICCAD)

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To meet the ever-increasing requirements of onchip communication, the trend is towards wavelength-routed optical networks-on-chip (WRONoCs), which support high-speed communication with low power. A typical WRONoC design flow consists of two consecutive steps: topological design and physical design. Current physical design tools interpret the input topology as a pure logic scheme and perform placement and routing for all network components from scratch. Due to the large design complexity and the layout constraints, additional waveguide crossings in the synthesized layouts are hardly avoidable, which results in an increase in insertion loss and crosstalk noise and thus degrades the network performance. In this work, we propose a physical design tool, ToPro, which retains the interconnection among the optical switching elements by projecting the structure of a WRONoC topology onto the physical plane, and focuses on the waveguide routing to the IP-cores. To avoid the increase in insertion loss and crosstalk noise, ToPro removes the extra crossings and long detours of waveguides by changing the routing order of nets. The experimental results demonstrate the superiority of ToPro in time-and energy-efficiency. For example, compared to a state-of-the-art design automation tool, ToPro synthesizes a network with 16 IP-cores with a 17% reduction on the worst-case insertion loss and decreases the synthesis time from more than six days to less than one second.

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Section: Introductionmentioning

confidence: 99%

“…Stimulated by recent breakthroughs in silicon photonics, optical networks-on-chip (ONoCs) have emerged as a next-generation solution to overcome the bandwidth and energy limitations of the electrical interconnects in multiprocessor system-on-chip (MP-SoC) [1,2]. As the name suggests, ONoCs use optical signals to transmit data [2]. Taking advantage of the wavelength-division multiplexing (WDM) technology and the ultra-low propagation delay of light in silicon, ONoCs promise to meet the high bandwidth demands while maintaining low latency and power [3].…”

Section: Introductionmentioning

confidence: 99%

LightR: A Fault-Tolerant Wavelength-Routed Optical Networks-on-Chip Topology

Zheng,

Li,

Tseng

et al. 2023

Applied Sciences

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Optical networks-on-chip (NoCs) have emerged as a next-generation solution to overcome the limitations of electrical NoCs. In particular, wavelength-routed optical networks-on-chip (WRONoCs) are well known for their high bandwidth and ultra-low signal delay. Despite these advantages, WRONoCs are challenged by reliability concerns, because the main components in WRONoCs, i.e., microring resonators (MRRs), are susceptible to fabrication inaccuracies. When an MRR along a signal path is defective, the signal transmitted on that path will fail to reach its designated destination, which leads to transmission errors and data loss. In this work, we propose a fault-tolerant WRONoC topology, LightR, which provides two independent signal paths for each master–slave pair to tolerate defective MRRs. Moreover, we minimize the MRR usage to enhance the reliability of the WRONoCs. The experimental results show that LightR is able to provide a higher reliability with a modest MRR usage, insertion loss, and crosstalk noise. As the fault rate or the network size grows, the advantages of LightR in terms of the fault tolerance become even more significant. For example, when considering the 3% fault rate of MRRs and a 64-master × 64-slave network, LightR decreases the number of error signals by 85–90% compared to the typical state-of-the-art WRONoC topologies.

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Wavelength-Routed Optical NoCs: Design and EDA — State of the Art and Future Directions: Invited Paper

Cited by 12 publications

References 30 publications

Optical network on chip: design of wavelength routed optical ring architecture

Optical network on chip: design of wavelength routed optical ring architecture

ToPro: A Topology Projector and Waveguide Router for Wavelength-Routed Optical Networks-on-Chip

LightR: A Fault-Tolerant Wavelength-Routed Optical Networks-on-Chip Topology

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