On product overlay (OPO) is one of the most critical parameters for the continued scaling according to Moore’s law. Without good overlay between the mask and the silicon wafer inside the lithography tool, yield will suffer1. As the OPO budget shrinks, non-lithography process induced stress causing in-plane distortions (IPD) becomes a more dominant contributor to the shrinking overlay budget2. To estimate the process induced in-plane wafer distortion after cucking the wafer onto the scanner board, a high-resolution measurement of the freeform wafer shape of the unclamped wafer with the gravity effect removed is needed. Measuring both intra and inter die wafer distortions, a feed-forward prediction algorithm, as has been published by ASML, minimizes the need for alignment marks on the die and wafer and can be performed at any lithography layer3. Up until now, the semiconductor industry has been using Coherent Gradient Sensing (CGS) interferometry or Fizeau interferometry to generate the wave front phase from the reflecting wafer surface to measure the free form wafer shape3,4,5. In this paper, we present a new method, Wave Front Phase Imaging (WFPI) for generating a very high-resolution wave front phase map of the light reflected off of the patterned silicon wafer surface. The wafer is held vertically to allow for the free wafer shape to be measured without having the wafer shape be impacted by gravity. We show data using a WFPI patterned wafer geometry tool that acquires 16.3 million data points on a 300mm patterned silicon wafer with 65μm spatial resolution using a total data acquisition time of 14 seconds.