Wave Interference Functions for Neuromorphic Computing

Rahman, Mostafizur; Khasanvis, Santosh; Shi, Jiajun; Moritz, Csaba Andras

doi:10.1109/tnano.2015.2438231

Cited by 16 publications

(9 citation statements)

References 18 publications

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“…Moreover, several spinwave-based concepts for neuromorphic computing have been proposed. [151][152][153][154][413][414][415] Finally, the asymmetric propagation and nonlinear behavior of spin waves renders them promising candidates for reservoir computing. [155][156][157]…”

Section: A Unconventional and Analog Computing Approachesmentioning

confidence: 99%

Introduction to Spin Wave Computing

Mahmoud¹,

Ciubotaru²,

Vanderveken³

et al. 2021

Preprint

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This paper provides a tutorial overview over recent vigorous efforts to develop computing systems based on spin waves instead of charges and voltages. Spin-wave computing can be considered as a subfield of spintronics, which uses magnetic excitations for computation and memory applications. The tutorial combines backgrounds in spin-wave and device physics as well as circuit engineering to create synergies between the physics and electrical engineering communities to advance the field towards practical spin-wave circuits. After an introduction to magnetic interactions and spin-wave physics, all relevant basic aspects of spin-wave computing and individual spin-wave devices are reviewed. The focus is on spin-wave majority gates as they are the most prominently pursued device concept. Subsequently, we discuss the current status and the challenges to combine spin-wave gates and obtain circuits and ultimately computing systems, considering essential aspects such as gate interconnection, logic level restoration, input-output consistency, and fan-out achievement. We argue that spin-wave circuits need to be embedded in conventional CMOS circuits to obtain complete functional hybrid computing systems. The state of the art of benchmarking such hybrid spin-wave--CMOS systems is reviewed and the current challenges to realize such systems are discussed. The benchmark indicates that hybrid spin-wave--CMOS systems promise ultralow-power operation and may ultimately outperform conventional CMOS circuits in terms of the power-delay-area product. Current challenges to achieve this goal include low-power signal restoration in spin-wave circuits as well as efficient spin-wave transducers.

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Section: A Unconventional and Analog Computing Approachesmentioning

confidence: 99%

Introduction to Spin Wave Computing

Mahmoud¹,

Ciubotaru²,

Vanderveken³

et al. 2021

Preprint

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“…At the logic/gate level, some basic single output gates (such as NOT, (N)AND, (N)OR, and X(N)OR) were reported in [8]- [10], while some multi-output gates were discussed in [11]- [13]. At the circuit level, dedicated operators for neuromorphic applications were developed in [14], [15]; examples are upper and lower threshold operators, truncated difference operators, literal operators, cyclic operators and minimum and maximum operators. In addition, exploring the concept of wave pipelining based operation was illustrated in [16].…”

Section: Introductionmentioning

confidence: 99%

Spin Wave Based Full Adder

Mahmoud

Vanderveken

Ciubotaru

et al. 2021

2021 IEEE International Symposium on Circuits and Systems (ISCAS)

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Spin Waves (SWs) propagate through magnetic waveguides and interfere with each other without consuming noticeable energy, which opens the road to new ultra-low energy circuit designs. In this paper we build upon SW features and propose a novel energy efficient Full Adder (FA) design consisting of 1 Majority and 2 XOR gates, which outputs Sum and Carry − out are generated by means of threshold and phase detection, respectively. We validate our proposal by means of MuMax3 micromagnetic simulations and we evaluate and compare its performance with state-of-the-art SW, 22 nm CMOS, Magnetic Tunnel Junction (MTJ), Spin Hall Effect (SHE), Domain Wall Motion (DWM), and Spin-CMOS implementations. Our evaluation indicates that the proposed SW FA consumes 22.5% and 43% less energy than the direct SW gate based and 22 nm CMOS counterparts, respectively. Moreover it exhibits a more than 3 orders of magnitude smaller energy consumption when compared with state-of-the-art MTJ, SHE, DWM, and Spin-CMOS based FAs, and outperforms its contenders in terms of area by requiring at least 22% less chip real-estate.

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“…Single output logic gates such as (N)AND, (N)OR, and X(N)OR were introduced in [5]- [7], whereas multi-output logic gates were suggested in [8]- [10]. On the other hand, different circuits, e.g., upper/lower threshold and minimum/maximum operators, were discussed at the conceptual level without validation in [11], 2-bit inputs SW multiplier was designed and validated by means of micromagnetic simulations in [12]. Last but not least, the wave pipelining of SW Majority gate-based circuits was discussed but not validated in [13].…”

Section: Introductionmentioning

confidence: 99%

Achieving Wave Pipelining in Spin Wave Technology

Mahmoud¹,

Vanderveken²,

Adelmann³

et al. 2021

Preprint

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By their very nature, voltage/current excited Spin Waves (SWs) propagate through waveguides without consuming noticeable power. If SW excitation is performed by the continuous application of voltages/currents to the input, which is usually the case, the overall energy consumption is determined by the transducer power and the circuit critical path delay, which leads to high energy consumption because of SWs slowness. However, if transducers are operated in pulses the energy becomes circuit delay independent and it is mainly determined by the transducer power and delay, thus pulse operation should be targeted. In this paper, we utilize a 3-input Majority gate (MAJ) to investigate the Continuous Mode Operation (CMO), and Pulse Mode Operation (PMO). Moreover, we validate CMO and PMO 3-input Majority gate by means of micromagnetic simulations. Furthermore, we evaluate and compare the CMO and PMO Majority gate implementations in term of energy. The results indicate that PMO diminishes MAJ gate energy consumption by a factor of 18. In addition, we describe how PMO can open the road towards the utilization of the Wave Pipelining (WP) concept in SW circuits. We validate the WP concept by means of micromagnetic simulations and we evaluate its implications in term of throughput. Our evaluation indicates that for a circuit formed by four cascaded MAJ gates WP increases the throughput by 3.6x.

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Wave Interference Functions for Neuromorphic Computing

Cited by 16 publications

References 18 publications

Introduction to Spin Wave Computing

Introduction to Spin Wave Computing

Spin Wave Based Full Adder

Achieving Wave Pipelining in Spin Wave Technology

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