Test wafers comprising damascene structures were designed and fabricated to investigate Cu dishing and oxide erosion. The mask design covered a wide range of linewidths and pitches, from 0.5 to 100 m, to represent such features as signal and power transmission lines, and probing or wire-bonding pads. Experiments were conducted to investigate the evolution of the pattern profile during polishing and to determine the onset and rates of dishing and erosion. The effects of Cu linewidth and area fraction on the rates of pattern planarization, Cu dishing, and oxide erosion have been quantified. The effect of hardness of the composite surface on dishing and erosion were examined. An optimization scheme, employing particle size, particle hardness, and pad stiffness, to enhance the selectivity between SiO 2 , Ta, and Cu, and to reduce die-scale nonplanarity is proposed.