Field programmable MCMs (FPMCMs) can be used to improve the cost-effectiveness of large logic emulation and reconfigurable computing systems. In this paper, we consider two MCM-D based FPMCMs developed at UCSC to illustrate the impact of chip size on substrate wiring density and module cost. We then present a simple model of an idealized FPMCM that can be used to generate relative cost and yield estimates for different architectures. Architectural implications of this model are presented including the optimal number of chips, effect of chip bonding technology on overall cost, and limits to the integration factor for MCMs. We then briefly consider how increasing CMOS density, and innovative technologies like chip-on-chip and chip stacking might affect substrate density in the near future.