Infrared Technology and Applications XLVII 2021
DOI: 10.1117/12.2588311
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Wafer-scale integration of antimonide-based MWIR FPAs

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“…The relatively high cost associated with the required cooling and serial processing of die-level hybridisation is a major barrier to bringing large-volume of low-cost products to market. To reduce manufacturing costs and increase array scaling, DARPA has launched a programme (called WIRED programme) to develop wafer-level integration for the production of large-format antimonide-based MWIR detectors on Si ROICs [139].…”
Section: Novel Iii-v Arrays Based On Type-ii Superlatticesmentioning
confidence: 99%
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“…The relatively high cost associated with the required cooling and serial processing of die-level hybridisation is a major barrier to bringing large-volume of low-cost products to market. To reduce manufacturing costs and increase array scaling, DARPA has launched a programme (called WIRED programme) to develop wafer-level integration for the production of large-format antimonide-based MWIR detectors on Si ROICs [139].…”
Section: Novel Iii-v Arrays Based On Type-ii Superlatticesmentioning
confidence: 99%
“…The bonding process is inhibited by the maximum thermal budget of the ROIC wafer. According to [139], the maximum thermal budget of CMOS wafers is estimated to be 425 • C for 2-6 h or 400 • C for 8-10 h without chip degradation. Also, the thermal expansion mismatch and the temperature difference between the bonding temperature and the cryogenic operating temperature cause significant stresses in the active detector region.…”
Section: Novel Iii-v Arrays Based On Type-ii Superlatticesmentioning
confidence: 99%