Wafer‐Scale CMOS‐Compatible Electro‐Thermally Actuated Nanomechanical Non‐Volatile Switch with Out‐of‐Plane Electrode Configuration

Abstract

The rapid growth of data‐intensive applications has significantly heightened the concerns about power consumption in current computing systems. From this perspective, there have been substantial efforts to implement ultra‐low power systems by integrating nanoelectromechanical non‐volatile switches (NEM‐NVS) with near‐zero leakage current into standard complementary metal‐oxide‐semiconductor (CMOS) circuits. To practically harness the potential of the NEM‐NVS, it is imperative to achieve high performance, such as low voltage, high on/off ratio, and high reliability, while simultaneously ensuring wafer‐scale CMOS compatibility. However, achieving these requirements is still challenging, primarily due to their electrostatic operation, in‐plane electrode configuration, and conventional fabrication methods. Here, an electro‐thermally actuated nanomechanical non‐volatile switch (ETAN‐NVS) with an out‐of‐plane electrode configuration along with an 8‐inch wafer‐scale CMOS‐compatible fabrication method is reported. By introducing the electrothermal mechanism into a vertically actuated buckling nanostructure, the fabricated ETAN‐NVS attains CMOS‐level voltage (<2.4 V), a high on/off ratio (>108), and exceptional reliability (>1300 cycles). Moreover, a successful wafer‐scale demonstration of the ETAN‐NVS using only a CMOS‐compatible process paves the way for 3D integration with CMOS logic.