Wafer‐Scale 2D Hafnium Diselenide Based Memristor Crossbar Array for Energy‐Efficient Neural Network Hardware

Abstract

area efficiency by mimicking human neurons, synapses, and their networks. [3,4] Memristors are known as promising candidates for artificial synapses, constituting a key building block for neuromorphic computing. Moreover, crossbar array (CBA) made of memristors is promising to construct neural networks due to its fast and highly parallelized computing capability that utilizes multiply-and-accumulate (MAC) operation based on Ohm's law and Kirchhoff 's law. [5,6] However, state-of-the-art memristive CBA using transition metal oxide (TMO) is suffering from challenges such as limited resistive switching (RS) ratio and considerable temporal (cycle-to-cycle) and spatial (device-todevice) variability, [7][8][9] which necessitates alternative material platforms with better switching reliability.Memristors based on 2D materials have emerged as a promising option over TMObased memristors [10,11] due to their unique properties and superior device performance, including large RS ratio, [12] low switching voltage, [12,13] small device variation, [14] as well as, capability of transition between the threshold and bipolar RS. [12,15] However, conventional 2D material-based memristive devices are fabricated using mechanical exfoliation, which lacks a good control of flake thickness and poor spatial variation. [16][17][18][19] Moreover, due to the single crystallinity of the exfoliated flake, post-treatments are required to decorate defects for creating switching pathways, such as, ion and electron beam irradiation, which hinder the implementation of circuits and computing hardware. [15,[20][21][22] To address these inherent limitations caused by mechanical exfoliation, considerable efforts have been dedicated to develop scalable fabrication processes. One such approach is liquid-phase exfoliation and spin-coating, which can produce large quantities of materials, but at the expense of crosspoint area scaling and nanoflake orientation control, resulting in poor endurance and low array density. [23][24][25] Another scalable approach is wafer-scale 2D material synthesis that by far has been primarily driven by logic applications which demand monolayer, high mobility, and single crystallinity. [26,27] Recently, memristors based on chemical vapor deposition (CVD) grown 2D materials with intrinsic defects have been demonstrated with the potential for wafer-scale device fabrication capability with low device Memristor crossbar with programmable conductance could overcome the energy consumption and speed limitations of neural networks when executing core computing tasks in image processing. However, the implementation of crossbar array (CBA) based on ultrathin 2D materials is hindered by challenges associated with large-scale material synthesis and device integration. Here, a memristor CBA is demonstrated using wafer-scale (2-inch) polycrystalline hafnium diselenide (HfSe 2 ) grown by molecular beam epitaxy, and a metal-assisted van der Waals transfer technique. The memristor exhibits small switching voltage (0.6 V), low switching energy...

High‐Performance Memristor Based on 2D Layered BiOI Nanosheet for Low‐Power Artificial Optoelectronic Synapses

“…Table 1 shows the comparison of the RS performance, including SET and RESET voltages, ON/OFF ratio, retention time and endurance cycle between our device with other 2D materials‐based memristors. [ 21–37 ] It indicates that our device not only possesses relatively high ON/OFF ratio, but also ultralow SET and RESET voltages when compared with previously published works. Inspiringly, the obtained ultralow SET voltage is one order of magnitude lower than that of most reported memristors based on 2D materials.…”

“…The memristor with vertical structure is demonstrated in Process I. When Ag electrode is positively [21] Ag/h-BN/Cu 0.72 −0.37 10 2 3 × 10 3 550 n 2016 [22] Ag/BNO x /graphene 0.7 −0.2 10 3 1.4 × 10 4 100 n 2017 [23] Graphene/MoS 2−x O x / graphene 1.1 −1.5 10 10 5 2 × 10 7 n 2018 [24] Au/Cr/MoS 2 /Cr/Au 1.4 −0.7 10 3 10 4 20 n 2018 [25] Ag/h-BN/graphene 5.2 −4 10 3 n 40 n 2019 [26] Cu/MoS 2 /Au 0.25 −0.15 4 1.8 × 10 3 20 n 2019 [27] Ag/MoS 2 /Pt 0.8 −0.6 10 3 10 5 10 6 7.35 nW 2020 [28] h-rGO/2D CMP/p-rGO/Al 2.9 −2.2 10 3 8 × 10 3 n 2.9 µW 2020 [29] Ti/h-BN/Cu 2.7 −0.86 10 9 10 4 1500 n 2020 [30] Au/Ag/MoS 2 /Si 0.4 −0.3 10 2 2 × 10 4 10 4 n 2020 [31] Ti/PdSe 2 /Au 0.73 −2 10 4 10 6 100 n 2021 [32] Ag/BP/ITO 0.39 −0.37 10 7 10 5 10 4 5 fW 2021 [33] Ti/HfSe x O y /HfSe 2 /Au 2.32 −2.5 10 3 1.5 × 10 4 40 n 2021 [34] Au/Ti/HfSe 2 /Ti/Au/Ti 0.74 −0.81 10 2 10 4 500 n 2021 [35] Au/Ni/MoO x /Mo 2 C/Ni/Au 0.5 −0.3 10 2 n 120 50 nW 2021 [36] Au/Cr/CuSe/Cr/Au 0.4 −0.4 10 2 10 4 300 11.4 µW 2022 [37] Ag/BiOI/Pt 0.05 −0.05 biased during the forming process, oxidized Ag + ions formed at the Ag electrode migrate to the Pt electrode, where Ag + ions are reduced to Ag atoms and then accumulated to grow Ag CFs (Process II), corresponding to the electroforming process. After electroforming, the device is switched from the HRS to the LRS, Ag conductive channel can be formed (Process III).…”

Bio‐Inspired 3D Artificial Neuromorphic Circuits

“…[115] In addition to digital computing, memristor-based crossbars enable high-speed and energy-efficient analog vector-matrix multiplication via Kirchhoff current law for summation and Ohm's law for multiplication. [176][177][178][179][180] As depicted in Figure 6g, a voltage vector is directly applied to the rows of the memristor crossbar, which is multiplied by the conductance of the cross point, resulting current injected into the column. Afterward, the currents on each column are summed with the total current being further converted to voltage.…”

CMOS-compatible compute-in-memory accelerators based on integrated ferroelectric synaptic arrays for convolution neural networks

“…For accurate VMM operation, synaptic devices are required, which can precisely adjust the conductance states via analog conductance modulation (5,11,12). In previous studies, several CIM devices with a crossbar structure have been demonstrated using two-terminal devices, such as phase-change and resistive-switching memories, as synaptic devices (13)(14)(15)(16)(17)(18). However, when CIM is implemented using crossbar arrays based on two-terminal devices, there are issues such as cross-talk, sneak path current, and nonlinear current-voltage characteristics (19)(20)(21).…”