2010 Proceedings 60th Electronic Components and Technology Conference (ECTC) 2010
DOI: 10.1109/ectc.2010.5490956
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Wafer level embedded System in Package (WL-eSiP) for mobile applications

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Cited by 7 publications
(2 citation statements)
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“…As for packaging technology, miniaturization of chips and packages, high density of I/O, and Fan-out PKG process applicability have been increasing. [1][2][3][4][5] To achieve these requirements, typical properties required for wafer coating materials include a higher resolution for higher electrode density and low temperature curable at the heat temperature of the substrate material of the Fan-out package. And other properties such as high insulation and heat resistance are required to package power semiconductors.…”
Section: Introductionmentioning
confidence: 99%
“…As for packaging technology, miniaturization of chips and packages, high density of I/O, and Fan-out PKG process applicability have been increasing. [1][2][3][4][5] To achieve these requirements, typical properties required for wafer coating materials include a higher resolution for higher electrode density and low temperature curable at the heat temperature of the substrate material of the Fan-out package. And other properties such as high insulation and heat resistance are required to package power semiconductors.…”
Section: Introductionmentioning
confidence: 99%
“…E MBEDDED wafer-level packaging (eWLP) draws more and more attraction due to its inherent advantages, i.e., high density, low cost, and high yields [1]. Many researchers are dedicated to wafer-level molding process, based on single chip [2], [3] as well as multiple-chip package [4]- [6].…”
Section: Introductionmentioning
confidence: 99%