Abstract:This paper presents a detailed description of the fabrication steps for wafer level processing of silicon interposers with copper filled TSVs as well as their subsequent assembly treatment. The electrical performance and characterization of the TSVs is also discussed. The interposers are created at 200 mm or 300 mm silicon wafers. The fabrication processes include deep reactive ion etching, TSV side wall isolation, PVD seed layer deposition, TSV filling by copper electroplating, wafer front side redistribution… Show more
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