Wafer Defect Localization and Classification Using Deep Learning Techniques

Shinde, Prashant P.; Pai, Priyadarshini P.; Adiga, Shashishekar P.

doi:10.1109/access.2022.3166512

Cited by 31 publications

(7 citation statements)

References 29 publications

(26 reference statements)

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“…Such advantages allow this method to be actively applied to the classification of wafer maps [26][27][28]. In addition, CNN-based wafer map classification studies using various data processing techniques have been conducted until recently [28][29][30][31][32].…”

Section: Wafer Map Pattern Classificationmentioning

confidence: 99%

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Boosted Stacking Ensemble Machine Learning Method for Wafer Map Pattern Classification

Choi¹,

Suh²,

Otto³

2023

Computers, Materials &Amp; Continua

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Recently, machine learning-based technologies have been developed to automate the classification of wafer map defect patterns during semiconductor manufacturing. The existing approaches used in the wafer map pattern classification include directly learning the image through a convolution neural network and applying the ensemble method after extracting image features. This study aims to classify wafer map defects more effectively and derive robust algorithms even for datasets with insufficient defect patterns. First, the number of defects during the actual process may be limited. Therefore, insufficient data are generated using convolutional auto-encoder (CAE), and the expanded data are verified using the evaluation technique of structural similarity index measure (SSIM). After extracting handcrafted features, a boosted stacking ensemble model that integrates the four base-level classifiers with the extreme gradient boosting classifier as a meta-level classifier is designed and built for training the model based on the expanded data for final prediction. Since the proposed algorithm shows better performance than those of existing ensemble classifiers even for insufficient defect patterns, the results of this study will contribute to improving the product quality and yield of the actual semiconductor manufacturing process.

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Section: Wafer Map Pattern Classificationmentioning

confidence: 99%

“…Therefore, 14,326 training datasets were extracted by randomly sampling from the labeled dataset. In order to apply the wafer map to a later process, all wafer maps were reshaped into (32,32) where defect patterns were evenly distributed.…”

Section: Experimental Analysis 41 Data Descriptionmentioning

confidence: 99%

Boosted Stacking Ensemble Machine Learning Method for Wafer Map Pattern Classification

Choi¹,

Suh²,

Otto³

2023

Computers, Materials &Amp; Continua

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“…For the purpose of wafer defect localization and classification, deep learning architectures such as YOLOv3 and YOLOv4 were proposed in [18]. When it comes to identifying and classifying wafer maps, YOLOv4 performed better than its predecessor, YOLOv3.…”

Section: Related Workmentioning

confidence: 99%

Classification of Silicon (Si) Wafer Material Defects in Semiconductor Choosers using a Deep Learning ShuffleNet-v2-CNN Model

Doss

Ramakrishnan

Kavitha

et al. 2022

Advances in Materials Science and Engineering

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e silicon wafer is one of the raw materials used to make semiconductor chipsets. Semiconductor failure or dysfunction could be the result of defects in the layers of this material. As a result, it is essential to work toward the development of a system that is both quick and precise in identifying and classifying wafer defects. Wafer map analysis is necessary for the quality control and analysis of the semiconductor manufacturing process. ere are some failure patterns that can be displayed by wafer maps. ese patterns can provide essential details that can assist engineers in determining the reason of wafer failures. In this research, a deep-learningbased silicon wafer defect identi cation and classi cation model is proposed. e main objective of this research is to identify and classify the silicon wafer defects using the wafer map images. is proposed model identi es and classi es the defects based on the wafer map images from the WM-811K dataset. e proposed model is composed of a pretrained deep transfer learning model called Shu eNet-v2 with convolutional neural network (CNN) architecture. is Shu eNet-v2-CNN performs the defects identi cation and classi cation process following the work ow of data preprocessing, data augmentation, feature extraction, and classi cation. For performance evaluation, the proposed Shu eNet-v2-CNN is evaluated with performance metrics like accuracy, recall, precision, and f1-score. e proposed model has obtained an overall accuracy of 96.93%, 95.40% precision, 96.26% recall, and 95.75% F1-score in classifying the silicon wafer defects based on the wafer map images.

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“…While ResNet50 and DenseNet121 only achieved 89% and 92% accuracy, respectively, the YOLOv3 and YOLOv4 variations of the YOLO architecture achieved over 94% classification accuracy in real time. Conclusion: Defects in semiconductor wafers can be identified and classified using object detection algorithms [10].…”

Section: Introductionmentioning

confidence: 99%

Wafer Defect Identification with Optimal Hyper-Parameter Tuning of Support Vector Machine using the Deep Feature of ResNet 101

Dash,

Ramadevi,

Amat

et al. 2023

IOP Conf. Ser.: Mater. Sci. Eng.

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As semiconductor processing technologies continue to advance, semiconductor wafers are becoming more densely packed and intricate, resulting in a higher incidence of surface imperfections. Therefore, it is crucial to detect these defects early and accurately classify them to pinpoint the root causes of the defects in the manufacturing process, ultimately leading to improved yield. Therefore, defect detection is critical in the industrial production of monocrystalline silicon. This study employs deep learning techniques to propose a framework for detecting defects on silicon wafers, focusing on optimizing the hyperparameters of support vector machines (SVM). Three methods were utilized to fine-tune the SVM parameters: Bayesian optimization, grid search, and random search techniques. This study demonstrates how selecting optimal values for SVM parameters can lead to better classification. Additionally, real manufacturing data were utilized to evaluate the performance of the proposed SVM classifier, with a comparison to state-of-the-art techniques in the field. By using deep features from ResNet 101 and a support vector machine, this work achieves 74.5% accuracy in identifying wafer defects without employing any optimization technique. However, the performance of the model was further improved by utilizing the random search optimization technique, which yielded the best result among the three optimization techniques tested, with an accuracy of 88.1%.

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Wafer Defect Localization and Classification Using Deep Learning Techniques

Cited by 31 publications

References 29 publications

Boosted Stacking Ensemble Machine Learning Method for Wafer Map Pattern Classification

Boosted Stacking Ensemble Machine Learning Method for Wafer Map Pattern Classification

Classification of Silicon (Si) Wafer Material Defects in Semiconductor Choosers using a Deep Learning ShuffleNet-v2-CNN Model

Wafer Defect Identification with Optimal Hyper-Parameter Tuning of Support Vector Machine using the Deep Feature of ResNet 101

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