VSSIM: Virtual machine based SSD simulator

Yoo, Jinsoo; Won, Youjip; Hwang, Joongwoo; Kang, Sooyong; Choi, Jongmoo; Yoon, Sungroh; Cha, Jaehyuk

doi:10.1109/msst.2013.6558443

Cited by 44 publications

(27 citation statements)

References 21 publications

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“…Currently, publications aiming at proposing software frameworks able to understand the behavior of an SSD mainly focus on disk emulation [3] and disk trace-driven simulation software [4], [7], [8], [9], [10], [11], [12]. Yoo et al [3], propose a disk emulation strategy based on a reconfigurable framework able to emulate a real SSD.…”

Section: Related Workmentioning

confidence: 99%

“…The SSD research community is therefore increasingly relying on sophisticated software tools that enable modeling and simulation of SSD platforms. Disk emulation tools in virtual environments [3] use functional simulation to obtain fast performance evaluation of the SSD in a host environment. This comes at the cost of constrained design space exploration capabilities due to the abstract simulation models.…”

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

SSDExplorer: A virtual platform for fine-grained design space exploration of Solid State Drives

Zuolo

Zambelli

Micheloni³

et al. 2014

Design, Automation &Amp; Test in Europe Conference &Amp; Exhibition (DATE), 2014

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Solid State Drives (SSDs) are gaining particular momentum in various frameworks such as multimedia, large data centers and cloud environments. Unfortunately, efficient CAD tools for SSD design space exploration able to assess the optimization of the device microarchitecture w.r.t. the target performance are still missing. This paper tries to close this gap by proposing SSDExplorer, a tool for fine-grained and fast design space exploration of SSD devices. SSDExplorer provides unprecedented insights into the architecture behavior and subcomponent interaction efficiency, while avoiding the need for the actual implementation of an FTL or of key hardware components. This is achieved by the introduction of suitable abstractions of the different components. This is confirmed by the thorough validation of SSDExplorer against a commercial SSD device.

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Section: Related Workmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

SSDExplorer: A virtual platform for fine-grained design space exploration of Solid State Drives

Zuolo

Zambelli

Micheloni³

et al. 2014

Design, Automation &Amp; Test in Europe Conference &Amp; Exhibition (DATE), 2014

View full text Add to dashboard Cite

show abstract

“…For similar reasons, device simulators like DiskSim [4] and others [1,8,12] have no use on our context. They allow the evaluation of devices parameters, but not the profiling of existing systems.…”

Section: Related Workmentioning

confidence: 99%

Towards fast profiling of storage devices regarding access sequentiality

Boito

Kassick

Navaux

et al. 2015

Proceedings of the 30th Annual ACM Symposium on Applied Computing

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International audienceThis work presents a tool for storage device profiling named SeRRa. Our tool obtains the sequential to random throughput ratio for reads and writes of different sizes. Several optimizations aim at adapting applications’ access patterns in order to generate contiguous accesses for improved performance when accessing storage devices like hard disks. However, when considering other storage options like RAID arrays and SSDs, the access time ratio between contiguous and non-contiguous accesses may not compensate for these optimizations’ cost. In this scenario, the information provided by our tool could be used to dynamically decide if optimizations are beneficial for performance, an important task to provide I/O throughput. In order to provide this information efficiently, SeRRa employs benchmarks to obtain the values for a subset of the parameter space and estimates the remaining values through a linear model. Extensive test campaigns with our tool on nine storage devices have shown median errors of approximately 5% (up to 55%) while taking only 1/168 of the originally needed time

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“…Existing works do not take into account the delay involved in switching the channels and ways [Park et al 2009a;Agrawal et al 2008]. However, it is found that the channel switch delay cannot be ignored in studying the effect of parallelism [Yoo et al 2013]. The most effective parallelism is governed not only by the number of channels and ways but also by the page write latency.…”

Section: Peak Energy Consumptionmentioning

confidence: 99%

“…With multichannel and multiway configuration, the SSD controller can perform multiple NAND operations concurrently, which results in higher performance. Pages across the multiple channels can negatively affect the overall SSD performance [Yoo et al 2013]. There have been a number of works on building an energy-efficient system with SSDs [Strande et al 2012].…”

Section: Related Workmentioning

confidence: 99%

Design Tradeoffs of SSDs

et al. 2015

Self Cite

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In this work, we studied the energy consumption characteristics of various SSD design parameters. We developed an accurate energy consumption model for SSDs that computes aggregate, as well as componentspecific, energy consumption of SSDs in sub-msec time scale. In our study, we used five different FTLs (page mapping, DFTL, block mapping, and two different hybrid mappings) and four different channel configurations (two, four, eight, and 16 channels) under seven different workloads (from large-scale enterprise systems to small-scale desktop applications) in a combinatorial manner. For each combination of the aforementioned parameters, we examined the energy consumption for individual hardware components of an SSD (microcontroller, DRAM, NAND flash, and host interface). The following are some of our findings. First, DFTL is the most energy-efficient address-mapping scheme among the five FTLs we tested due to its good write amplification and small DRAM footprint. Second, a significant fraction of energy is being consumed by idle flash chips waiting for the completion of NAND operations in the other channels. FTL should be designed to fully exploit the internal parallelism so that energy consumption by idle chips is minimized. Third, as a means to increase the internal parallelism, increasing way parallelism (the number of flash chips in a channel) is more effective than increasing channel parallelism in terms of peak energy consumption, performance, and hardware complexity. Fourth, in designing high-performance and energy-efficient SSDs, channel switching delay, way switching delay, and page write latency need to be incorporated in an integrated manner to determine the optimal configuration of internal parallelism.

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VSSIM: Virtual machine based SSD simulator

Cited by 44 publications

References 21 publications

SSDExplorer: A virtual platform for fine-grained design space exploration of Solid State Drives

SSDExplorer: A virtual platform for fine-grained design space exploration of Solid State Drives

Towards fast profiling of storage devices regarding access sequentiality

Design Tradeoffs of SSDs

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