VSIPL: an object-based open standard API for vector, signal, and image processing

Janka, Randall S.; Judd, R.; Lebak, James; Richards, Mark; Campbell, Daniel P.

doi:10.1109/icassp.2001.941073

Cited by 13 publications

(7 citation statements)

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“…Our ongoing work includes the development of a DIFtoVSIPL code generator for . 'synthesis from DIF specifications to VSIPL [12] implememations, and research in synthesis techniques for dalaflow models of computation that have increased eNNressive power compared to SDF.…”

Section: Resultsmentioning

confidence: 99%

“…Extensibility: This software synthesis framework is library-based (in contrast to predefined inline code generation) such that DIF programmers can associate actors with desired C functions either designed by themselves or obtained from any existing library. It supports general C-based libraries, e.g., one-dimensional signal processing libraries and image/video processing libraries from Texas Instruments [24,25], and can easily be extended to support C-based APIs, such as VSIPL [12]. 2.…”

Section: Introductionmentioning

confidence: 99%

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Software synthesis from the dataflow interchange format

Hsu

Bhattacharyya

2005

Proceedings of the 2005 Workshop on Software and Compilers for Embedded Systems - SCOPES '05

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Specification, validation, and synthesis are important aspects of embedded systems design. The use of dataflow-based design environments for these purposes is becoming increasingly popular in the domain of digital signal processing (DSP). The dataflow inter-change format (DIF) [11] and the associated DIF package have been developed for specoeying, working with, and transferring dataflow-based DSP designs across tools. In this paper, we present the newly developed DIF-to-C software synthesis framework for automatically generating monolithic C-code implementations from DSP system specifications that are programmed in DIF. This framework allows designers to efficiently explore the complex range of implementation tradeofJ~ that are available through various dataflow-based techniques for scheduling and memory management. Furthermore, the DIF-to-C framework provides a standard, vendor-neutral mechanism for linking coarse grain data-flow optimizations with fine grain handoptimized libraries and the large body of optimization techniques in the area of C compilers for DSP. 7Through experiments involving several DSP applications, we demonstrate the novel and useful capabilities of our DIF-to-C software synthesis framework.

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Section: Resultsmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Software synthesis from the dataflow interchange format

Hsu

Bhattacharyya

2005

Proceedings of the 2005 Workshop on Software and Compilers for Embedded Systems - SCOPES '05

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“…In the software world, standardized libraries such as VSIPL (22) and LinPack have directly affected how compilers are built and even how machines are made. If such a configurable computing library had a (forcibly) high adoption rate, it is likely that device vendors would be motivated to optimize their mappings to elements in the library, or even make architectural enhancements to give them a competitive advantage over their peers.…”

Section: Architecture Shaping Through Library Standardsmentioning

confidence: 99%

“…One example, "Does the tool support parallel computing?" The report lists many "measures" for evaluating tools (p. [20][21][22][23][24][25][26]. Many of these are questions to ask when evaluating a tool and do not lend them selves to quantitative measurement.…”

Section: Fpga Tool Taxonomy Final Report Black River Systemsmentioning

confidence: 99%

Future Field Programmable Gate Array (FPGA) Design Methodologies and Tool Flows

Wirthlin¹,

Nelson²,

Hutchings³

et al. 2008

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“…Our ongoing work on DIF includes using AIF to develop a component within the DIF package to interface DIF to and from VSIPL [7], which is an important publicly-available library for DSP software design. Such a capability would enable tools to port designs efficiently to VSIPL-based implementations, and to port designs to other tools through the AIF-based integration of DIF and VSIPL.…”

Section: Summary and Current Statusmentioning

confidence: 99%