VLSI implementation of synaptic weighting and summing in pulse coded neural-type cells

Moon, Gyu; Zaghloul, Mona; Newcomb, R.W.

doi:10.1109/72.129412

Cited by 51 publications

(8 citation statements)

References 18 publications

(3 reference statements)

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“…Electronic hardware realizations of ANN have been explored by several authors [22], [23], [26], [47], [0], [51], [59], [78], [98], [101]. Such implementations typically employ CMOS analog, digital, or hybrid (analog/digital) electronic circuits.…”

Section: A Performance Of Hardware Realization Of the Nnlr Parsermentioning

confidence: 99%

A neural-network architecture for syntax analysis

Chen

Honavar

1999

IEEE Trans. Neural Netw.

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Abstract-Artificial neural networks (ANN's), due to their inherent parallelism, offer an attractive paradigm for implementation of symbol processing systems for applications in computer science and artificial intelligence. This paper explores systematic synthesis of modular neural-network architectures for syntax analysis using a prespecified grammar-a prototypical symbol processing task which finds applications in programming language interpretation, syntax analysis of symbolic expressions, and high-performance compilers. The proposed architecture is assembled from ANN components for lexical analysis, stack, parsing and parse tree construction. Each of these modules takes advantage of parallel content-based pattern matching using a neural associative memory. The proposed neural-network architecture for syntax analysis provides a relatively efficient and high performance alternative to current computer systems for applications that involve parsing of LR grammars which constitute a widely used subset of deterministic context-free grammars. Comparison of quantitatively estimated performance of such a system [implemented using current CMOS very large scale integration (VLSI) technology] with that of conventional computers demonstrates the benefits of massively parallel neuralnetwork architectures for symbol processing applications.Index Terms-Lexical analysis, modular neural networks, neural associative processing, neural associative processor, neural parser, neural symbolic processing, parsing, syntax analysis.

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Section: A Performance Of Hardware Realization Of the Nnlr Parsermentioning

confidence: 99%

A neural-network architecture for syntax analysis

Chen

Honavar

1999

IEEE Trans. Neural Netw.

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“…In Hochet, et al, [35] have implemented a Kohonen network utilizing Frequency Coded Pulse Streams. In addition, Danielli, et al, [15] and Moon, et al [63]have implemented a backpropagation network based upon Pulse Frequency/Coding Modulation.…”

Section: Metal Nitride Oxide Silicon (Mnos) Technology Was Pioneered mentioning

confidence: 99%

Analog Very Large Scale Integration (VLSI) Implementations of Artificial Neural Networks

Hinman¹

1992

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“…One of the effective approaches for hardware implementation of neural networks is a pulse stream-based architecture [1][2][3][4][5][6][7]. In synchronous pulse neural networks, the signal level is represented by pulse density which is normalized so that the maximum pulse frequency f MAX is 1.0.…”

Section: Introductionmentioning

confidence: 99%

A multilayer neural network with pulse position modulation

Hikawa

2003

Systems & Computers in Japan

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SUMMARYThe problem of the pulse mode neural network is that the synapse weight is bounded between +1 and -1. In order to enhance the weight range, this paper proposes a new weighting method that is a combination of pulse density modulation and pulse position modulation (PPM). The feasibility of the proposed method is verified by experimental MNN with on-chip learning. A modified back-propagation algorithm is used for the on-chip learning. The experimental results show that the proposed MNN architecture has the ability to handle high-resolution classifying problems and good on-chip learning capability.

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VLSI implementation of synaptic weighting and summing in pulse coded neural-type cells

Cited by 51 publications

References 18 publications

A neural-network architecture for syntax analysis

A neural-network architecture for syntax analysis

Analog Very Large Scale Integration (VLSI) Implementations of Artificial Neural Networks

A multilayer neural network with pulse position modulation

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