VLSI implementation of MQ decoder in JPEG2000

Kulkarni, Omkar C.; Sarawadekar, Kishor; Banerjee, Swapna

doi:10.1109/techsym.2011.5783844

Cited by 5 publications

(3 citation statements)

References 14 publications

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“…The real-time realization of several algorithms reduced the frame rate requirement. Kulkarni et al [37] proposed the high-speed and area-efficient architecture implemented on Virtex 2 FPGA. The high-frequency and the low hardware costs were achieved by using the Virtex 2 FPGA.…”

Section: Related Workmentioning

confidence: 99%

“…Table 6 presents the comparative analysis of proposed PET with the existing novel MQ-decoder [11], flexible JPEG-2000 [38], VLSI-based JPEG2000 [37], FPGA-based binary arithmetic MQ-coder [21] for Virtex 2-XC2V6000-6 architecture.…”

Section: Device Utilizationmentioning

confidence: 99%

“…But, the proposed AM VLSI-based JPEG2000 [37] FPGA-based binary arithmetic MQ-coder [21] Novel MQcoder [11] AMMQ-coder (proposed) Besides, the author separately computes the compression ratio for mother/daughter, Vassar, ballroom, pedestrian area and rush hour for the existing ABRC [23], M-coder, MQ-coder and the proposed AMMQ-coder architecture. Table 11 shows the compression ratio analysis for various datasets.…”

Section: Encoding Performancementioning

confidence: 99%

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FPGA-based Auxiliary Minutest MQ-coder architecture of JPEG2000

Jayavathi¹,

Shenbagavalli²

2017

J Real-Time Image Proc

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Embedded Block Coding with Optimized Truncation (EBCOT) used in JPEG2000 standard performs the sequential processing of code blocks for clear images. The employment of Matrix Quantizer (MQ) in EBCOT reduces the computational burden by generating the context decision pair from probabilistic estimation. But, it consumes huge devices and occupies large memory space that leads to the difficulties in hardware design. The bit truncation in MQ-coder reduces the computational complexities that lead to a reduction in the memory space occupation in the hardware platform. This paper proposes the Auxiliary Minutest MQ (AMMQ) architecture for bit truncation in the probability estimation of context decision pair making. The reduction in a number of bits minimizes the slice registers and lookup tables utilization that offers less flipflop consumption to achieve the compact chip development for JPEG2000 compression. Besides, the reduction in computational steps effectively minimizes the time delay and hence the high operating frequency. The comparative analysis of proposed AMMQ-coder architecture with the existing architectures regarding the memory assures the effectiveness of new way of bit truncation scheme in the JPEG2000 compression.

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Section: Related Workmentioning

confidence: 99%