Virtual quadrature‐coordinate EPLL for single‐phase grid information synchronisation

Wang, Guizhong; Wu, Fengjiang

doi:10.1049/el.2018.7083

“…The Enhanced PLL (E-PLL) synchronizing circuit [22], [25]- [28], can be described as a multiplier-based PLL [4]. The distinctive feature of this circuit is the incorporation of an amplitude control loop, which is included in the PD block, as it can be seen in Fig.…”

Section: A the Single-phase E-pllmentioning

confidence: 99%

Comparative analysis between different approaches for single-phase PLLs

Monteiro¹,

Pinto²,

Monteiro³

et al. 2022

IJPELEC

0

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This paper presents a comparative analysis between two distinct synchronizing circuits, which are usually applied as the core of control algorithms for single-phase power quality applications. One of these synchronizing circuits corresponds to a single-phase Phase-Locked Loop (PLL), implemented in α-β coordinates (D Dβ-PLL), whereas the other one corresponds to the Enhanced PLL (E-PLL). The major contribution of this paper is to present a single-phase PLL oriented to power quality applications, with a very simple structure, capable to be synchronized with the fundamental component of an input signal (voltage or current), even considering substantial disturbances, such as, frequency deviations, phase shifts, harmonic components and amplitude variations. Simulation and experimental results, involving these two synchronizing circuits submitted to three different test cases, are provided in order to compare their transient and steady-state performance. Moreover, it is also presented a comparison involving the processing speed and memory requirements of these synchronizing circuits in the DSP TMS320F28335.

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“…Given the wide range of applications for synchronizing circuits, and being the Phase-Locked Loop (PLL) the most used synchronizing circuit, due to its adaptability to different conditions [24], this paper presents a relevant and comprehensive comparison between two PLL schemes: The Enhanced PLL (E-PLL) [22], [25]- [28], and the PLL implemented in D-β coordinates (Dβ-PLL) [29] [30] modified to single-phase circuits. The Dβ-PLL corresponds to a pPLL type and can be understood as a type of Synchronous Reference Frame-PLL (SRF-PLL) [31]- [32].…”

Section: Introductionmentioning

confidence: 99%

Comparative analysis between different approaches for single-phase PLLs

Monteiro¹,

Pinto²,

Monteiro³

et al. 2022

IJPELEC

0

View full text Add to dashboard Cite

This paper presents a comparative analysis between two distinct synchronizing circuits, which are usually applied as the core of control algorithms for single-phase power quality applications. One of these synchronizing circuits corresponds to a single-phase Phase-Locked Loop (PLL), implemented in α-β coordinates (D Dβ-PLL), whereas the other one corresponds to the Enhanced PLL (E-PLL). The major contribution of this paper is to present a single-phase PLL oriented to power quality applications, with a very simple structure, capable to be synchronized with the fundamental component of an input signal (voltage or current), even considering substantial disturbances, such as, frequency deviations, phase shifts, harmonic components and amplitude variations. Simulation and experimental results, involving these two synchronizing circuits submitted to three different test cases, are provided in order to compare their transient and steady-state performance. Moreover, it is also presented a comparison involving the processing speed and memory requirements of these synchronizing circuits in the DSP TMS320F28335.

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“…Thus, fast detection of phase angle information is crucial for a good control over grid connected instruments. The state‐of‐the‐art single‐phase PLL algorithms are moving average filter (MAF)–PLL [2 ], delayed signal cancellation–PLL [3 ], enhanced PLL [4 ] and demodulation‐based PLL [5 ]. In general, PLL is a type‐2 control system adheres to a trade‐off in the steady‐state accuracy and the response time [6 ].…”

Section: Introductionmentioning

confidence: 99%

Modified non-adaptive bandpass filter based phase locked loop

Verma

¹

,

Jarial

²

,

Rao

³

2020

Electronics Letters

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In this Letter, a demodulation based pre‐filtering technique is proposed for fast detection of the single‐phase grid variables. The estimation of grid voltage parameters is achieved through a Type‐I synchronous reference frame phase‐locked loop (PLL). The modified bandpass filter in the pre‐filtering stage ensure a better rejection of the DC‐offset and harmonics. Thus, the grid variables are estimated rapidly with the help of a simple proportional controller. Consequently, in‐loop filtering burden and the effort required to tune the PLL is minimal. However, steady errors are witnessed in the fundamental amplitude and the phase information which are mitigated by a curve fitting technique. Importantly, the proposed PLL scheme has improved the dynamic performance under off‐nominal frequency conditions with immunity against grid disturbances. The robustness of the proposed algorithm is experimentally verified vis‐à‐vis existing literature.

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Virtual quadrature‐coordinate EPLL for single‐phase grid information synchronisation

Cited by 9 publications

References 7 publications

Comparative analysis between different approaches for single-phase PLLs

Comparative analysis between different approaches for single-phase PLLs

Comparative analysis between different approaches for single-phase PLLs

Modified non-adaptive bandpass filter based phase locked loop

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