VIPMOS-a novel buried injector structure for EPROM applications

Wijburg, R.C.M.; Hemink, G.; Middelhoek, J.; Wallinga, Hans; Mouthaan, T.

doi:10.1109/16.65744

Cited by 22 publications

(9 citation statements)

References 28 publications

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“…At the University of Twente a new way of programming an EEPROM, by means of hot electron injection, has been developed. This type of non-volatile memory is known as the VIPMOS EEPROM [9,10]. The acronym VIPMOS stands for vertical injection punchthrough based metal oxide semiconductor.…”

Section: Breakdown In Vipmos Eeprom Devicesmentioning

confidence: 99%

Dielectric breakdown II: related projects at the University of twente

1997

Microelectronics Reliability

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In this paper an overview is given of the related activities in our group of the University of Twente. These are on thin film transistors with the irdaerent difficulty of making a gate dielectric at low temperature, on thin dielectrics for EEPROM devices with well-known requirements with respect to charge retention and endurance and, finally, on thin film diodes in displays with unexpected breakdown properties.

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Section: Breakdown In Vipmos Eeprom Devicesmentioning

confidence: 99%

Dielectric breakdown II: related projects at the University of twente

1997

Microelectronics Reliability

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“…Besides, developing dielectric layers with proper electrical qualities becomes even more complex when, in addition to good isolating properties for low and moderate applied voltages, good conduction properties at high voltages are required. This concerns the vertical injection punchthrough based MOS (VIPMOS) EEPROM [4], [5]. During reading and programming (low and moderate voltages) charge leakage is unacceptable, while high voltages are needed for achieving interpoly tunneling as erasing mechanism [4], [5].…”

Section: Introductionmentioning

confidence: 99%

Deposited inter-polysilicon dielectrics for nonvolatile memories

Klootwijk

Kranenburg

Woerlee

et al. 1999

IEEE Trans. Electron Devices

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Deposited instead of thermally grown oxides were studied to form very high-quality inter-polysilicon dielectric layers for embedded nonvolatile memory application. It was found that by optimizing the microstructure, i.e., texture and morphology of the polysilicon layers, and by optimizing the post dielectric deposition anneal, very high-quality dielectric layers can be obtained. In this paper it is shown on simple capacitor structure level and full EEPROM device level that the electrical properties of interpoly dielectric layers can be improved tremendously by using deposited dielectric layers with additional rapid thermal anneal. Typical results are: a high charge-to-breakdown (QBD 25 C/cm 2 ); low leakage currents and decreased charge trapping during constant current stress. An additional advantage is the low thermal budget, which is very attractive for embedded applications. However, results depend on the polysilicon preparation, dielectric type and RTP anneal environment.From electrical evaluation it appeared that even for deposited dielectric layers the influence of polysilicon surface roughness and corners is considerable.The optimized combination of flat polysilicon layers, deposited inter-polysilicon dielectric and additional optimized rapid thermal anneal have been applied in full EEPROM devices. Cycling over one million cycles was possible, which indicates an endurance improvement by a factor of 10.

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“…The electrons are accelerated in the high electric field and some of them gain sufficient energy to surmount the Si/SiO 2 potential barrier. The injection probability is defined as I_ate/Iin j and depends on the doping profile between the buried injector and the S1/SIO 2 interface [1].…”

Section: The Vipmos Structurementioning

confidence: 99%

“…A buried injector, which is biased by means of punch-through, can be used in substrate hot electron injection EEPROM devices [1]. In order to optimize this device an empirical expression for the injection probability as a function of the effective barrier height and the average electron energy is proposed and verified by measurements on a variety of devices.…”

Section: Introductionmentioning

confidence: 99%