Victim retention for reducing cache misses in tiled chip multiprocessors

Das, Shirshendu; Kapoor, Hemangee K.

doi:10.1016/j.micpro.2013.11.005

Cited by 15 publications

(10 citation statements)

References 24 publications

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“…The main objective of CMP-SVR is to improve the cache performance by dynamically managing the associativity of the sets with minimum storage, area and power overhead as compared to the other similar techniques [3], [5].…”

Section: Proposed Architecturementioning

confidence: 99%

“…The result of CMP-SVR has been compared with the previously proposed CMP-VR [5]. The configuration used for CMP-VR is same as mentioned in Table I (except the fellowgroup size, as CMP-VR has no fellow group concept).…”

Section: F Comparison With Cmp-vrmentioning

confidence: 99%

“…In an earlier work we proposed a technique called CMP-VR [5] to dynamically manage the associativity of the sets in LLC. It divides the ways of each set into two storage groups: normal storage (NT) and reserve storage (RT).…”

Section: Introductionmentioning

confidence: 99%

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Dynamic Associativity Management Using Fellow Sets

Das

Kapoor

2013

2013 International Symposium on Electronic System Design

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The memory accesses of todays applications are non-uniformly distributed across the cache sets and as a result some sets of the cache are heavily used while some other sets remain underutilized. This paper presents CMP-SVR, an approach to dynamically increase the associativity of heavily used sets without increasing the cache size. It divides the last level cache (LLC) into two sections: normal storage (NT) and reserve storage (RT). Some number of ways (25% to 50%) from each set are reserved for RT and the remaining ways belongs to NT. The sets are divided into some groups called fellow-groups and a set can use the reserve ways of its fellow sets to increase its associativity during execution. An additional tag-array (SA-TGS) for RT has been used to make the searching easier and less expensive. SA-TGS is almost like an N -way set associative cache where its associativity depends on the number of reserve ways per set and the number of sets in a fellow-group. CMP-SVR has less storage, area and energy overhead as compared to the other techniques proposed for dynamic associativity management. Full system simulation shows on average of 8% improvement in cycles per instruction (CPI) and 28% improvement in miss-rate.

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Section: Proposed Architecturementioning

confidence: 99%

Section: F Comparison With Cmp-vrmentioning

confidence: 99%

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Dynamic Associativity Management Using Fellow Sets

Das

Kapoor

2013

2013 International Symposium on Electronic System Design

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“…cache partitioning [14], non uniform cache access (NUCA) [8,7], replacement policies [13], on-chip communication [2], data replication [4,18] etc. Another important direction of research to improve LLC performance is dynamic associativity management (DAM) [6,15,17,5]. In DAM, the associativity of a set can be managed (increased/decreased) dynamically without changing the actual size of the cache.…”

Section: Introductionmentioning

confidence: 99%

“…Here the one-to-one mapping between tag and data is lost and therefore forward/backward pointers are used. CMP-VR [6] is another technique proposed to dynamically increase the associativity of the heavily used sets with lesser area and storage overhead as compared to other DAM approaches. It divides the ways of each set into two storage groups: normal storage (NT) and reserve storage (RT).…”

Section: Introductionmentioning

confidence: 99%

Dynamic associativity management using utility based way-sharing

Das

Kapoor

2015

Proceedings of the 30th Annual ACM Symposium on Applied Computing

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The non-uniform distribution of memory accesses of todays applications affect the performance of cache memories. Due to such non-uniform accesses some sets of large sized caches are used heavily while some other sets are used lightly. This paper presents a technique WS-DAM, to dynamically increase the associativity of the heavily used sets without increasing the cache size. The heavily used sets can use the idle ways of the lightly used sets to distribute the load. A limited number of ways from every lightly used set are reserved for the heavily used sets. To search a block in a heavily used set, both: the set and the entire reserve area is searched. To reduce the cost of searching the entire reserve storage an additional tag-array is used. During execution the sets are re-categorized at intervals. The proposed technique needs much lesser storage, area and power overhead as compared to the other similar techniques. It improves both miss rate and CPI by 14.46% and 6.63% respectively as compared to an existing technique called V-Way. WS-DAM is also compared with another existing proposal called CMP-VR and it improves the performance by 9% and 4.20% in terms of miss-rate and CPI respectively.

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Role of Cache Replacement Policies in High Performance Computing Systems: A Survey

Das

2018

Communications in Computer and Information Science

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Victim retention for reducing cache misses in tiled chip multiprocessors

Cited by 15 publications

References 24 publications

Dynamic Associativity Management Using Fellow Sets

Dynamic Associativity Management Using Fellow Sets

Dynamic associativity management using utility based way-sharing

Role of Cache Replacement Policies in High Performance Computing Systems: A Survey

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