Vertical optical power delivery and inter-chip interconnect concept based on surface-normal MQW modulators

Gu, Tian; Venkataraman, Anupama; Haney, Michael W.

doi:10.1109/ipcon.2013.6656354

Cited by 1 publication

(2 citation statements)

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“…3, providing chip-to-chip interconnections, as well as the means to couple optical power into the fabric from, e.g., arrays of high wall-plug efficiency CW VCSELs mounted above the hybrid chip [28]. To realize vertical out-of-plane coupling, a tapered facet coupler is fabricated directly from a waveguide, which reflects the CW light originally propagating in the waveguide onto the reflection-mode modulator or a reflector via total internal reflection.…”

Section: Integrated Optical Fabricsmentioning

confidence: 99%

“…Assuming 100 Tbps for chip I/O, ∼1cm 2 of the chip area is required for the areal I/O "pads" at a 100 μm device pitch, which corresponds to a ∼1 mm wide patch on the chip periphery-leaving the interior area allocated to the intra-chip global OIs and the integration of an efficient CW VCSEL array to provide power to the entire chip-scale interconnect fabric via the tapered waveguide couplers. With a few rows of chip I/O around the chip perimeter, a low-profile 3-D edge interface can be used for inter-chip communication [28]. The lithographically-defined optical couplers fabricated directly from polymer multi-mode waveguides to a large extent mitigate packaging alignment issues.…”

Section: Link Density Projectionmentioning

confidence: 99%

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Chip-Level Multiple Quantum Well Modulator-Based Optical Interconnects

Nair

Haney

2013

J. Lightwave Technol.

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High performance computing systems are becoming increasingly limited by the capacity of interconnects due to the continued scaling down of CMOS critical dimensions, resulting in the implementation of optical interconnects at ever decreasing distances. At the chip level, the communication bottleneck and energy consumption per bit are now major limitations to the continued performance scaling of microprocessors. In this paper, a novel integrated photonic approach is presented that uses polymer waveguides and surface-normal GaAs/AlAs multiple quantum well devices integrated directly onto a silicon chip. The concept provides sub-pJ/b performance and seamless interfacing between the on-and off-chip domains. This is the first demonstrated waveguide-coupled surface-normal MQW-based approach to be fully integrated within a photonic layer and to a large extent mitigates packaging issues for future photonics systems integrated with Si chips. Key aspects of the architecture are efficient and minimum-footprint optical fabrics and low-power-consuming optical transceivers. Gray-scale lithography is used to fabricate the 3-D coupling structures directly in the waveguide polymer layer. Analyses and experimental results show that the optical fabric concept provides the necessary bandwidth density and low power consumption for future chip-scale interconnections.Index Terms-Multiple quantum well modulators, optical interconnects, optical waveguides, photonic integrated circuits.

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Section: Integrated Optical Fabricsmentioning

confidence: 99%

Section: Link Density Projectionmentioning

confidence: 99%