Vertical ferroelectric thin-film transistor array with a 10-nm gate length for high-density three-dimensional memory applications

Abstract

Hafnia-based ferroelectric thin-film transistors (FeTFTs) are regarded as promising candidates for future nonvolatile memory devices owing to their low power consumption, high operational speed, and complementary metal–oxide–semiconductor compatibility. However, the scalability of hafnia-based materials and the feasibility of three-dimensional (3D) device fabrication should be confirmed for ultrahigh-density memory applications. In this work, we demonstrate that FeTFTs can be scaled down to a 10-nm dimension using the vertical structure with a hafnia-based ferroelectric gate insulating layer and an oxide semiconductor channel. We show that such vertical FeTFTs can be operated with an effective device size of 0.005 μm2, a fast operation speed of <100 ns, and a high endurance of 108 cycles. Additionally, the string-level NAND operation is demonstrated using the vertical FeTFT array. Finally, device simulation confirms the possibility of ultrahigh-density 3D ferroelectric NAND with 200 gate stacks. These results demonstrate the ultrahigh scalability of FeTFTs as a promising candidate for next-generation 3D nonvolatile memory.

Highly-scaled and fully-integrated 3-dimensional ferroelectric transistor array for hardware implementation of neural networks

“…The 3D FeNAND arrays with metal-ferroelectric-semiconductor-structured memory cells were fabricated using photolithography and the lift-off method (Supplementary Fig. 1 ) 24 , 41 . First, TiN word lines (WLs) and SiO 2 layers were alternately deposited.…”

“…Also, ferroelectric transistors have the potential to be adopted in high-density 3D NNs due to their high scalability and CMOS-compatibility. The high scalability of hafnia-based ferroelectrics can be advantageous for 3D memory applications 40,41 . Recent research demonstrated that hafnia-based ferroelectrics could be operated with a thickness under a few nanometers [42][43][44] .…”

Ferroelectric Transistors for Memory and Neuromorphic Device Applications

“…[22,24,25,[56][57][58][59][60] Furthermore, the facile deposition of hafnia-based ferroelectrics using ALD has been used to fabricate next-generation 3D memory devices based on ferroelectric hafnia. [23,26,61,62]…”

“…Due to these advantages, hafnia-based ferroelectrics have been used in next-generation memory devices (such as ferroelectric capacitors, transistors, and tunnel junctions [FTJs]). [22][23][24][25][26] This paper reviews the recent findings and applications of hafnia-based ferroelectrics, highlighting the recent advances in ferroelectric transistors for next-generation memory and neuromorphic Ferroelectric materials have been intensively investigated for highperformance nonvolatile memory devices in the past decades, owing to their nonvolatile polarization characteristics. Ferroelectric memory devices are expected to exhibit lower power consumption and higher speed than conventional memory devices.…”

Optimal Aluminum Doping Method in PEALD for Designing Outstandingly Stable InAlZnO TFT

“…[7] The extremely low off-current of oxide semiconductors can improve the retention of dynamic random-access memory (DRAM) [8,9] by lowering the charge loss through the transistor, and oxide semiconductors exhibit good compatibility with various insulating layers, allowing them to be used as semiconductor materials for NAND flash [10,11] or ferroelectric random-access memory (FeRAM). [12] For these various applications of oxide semiconductors, it is important to understand the role of the elements in oxide semiconductors to optimize the characteristics of thin films and devices. In particular, the characteristics of the devices can vary dramatically depending on the ratio of the cations in the oxide semiconductors.…”