Vertical constrained coding for phase-change memory with thermal crosstalk

Abstract

Phase-change memory (PCM) has been widely con sidered as one of the most promising non-volatile memory (NVM) technologies due to its high scalability and cost effectiveness. A critical reliability issue caused by PCM cell down scaling is the thermal crosstalk, which leads to the change of a cell's state while its adjacent cells are being programmed by a high-current reset pulse. In this paper, we propose novel vertical constrained coding scheme in conjunction with parallel programming to mitigate the thermal crosstalk for PCM in both the bit-line (BL) and word-line (WL) directions. We further propose efficient finite-state encoding methods to design capacity-approaching constrained codes which serve as base codes of the vertical constrained coding scheme.Simulation results show that the proposed schemes can effectively reduce the probability of disturbed bits due to thermal crosstalk, and hence help to push the scaling limitation of PCM. It has also been found that the proposed constrained coding scheme can reduce the probability of the reset state, and thereby improve the endurance of PCM.

Odd/Even Invert coding for phase change memory with thermal crosstalk

“…Moreover, a critical reliability issue in PCM is the write disturb problem, also known as thermal crosstalk, which arises from inter-cell thermal distribution. When programming a PCM cell, particularly resetting a cell, the generated heat may disseminate to neighboring cells thus disturbing stored values in idle cells that are in the reset state [29][30][31][32] error that can be corrected by rewriting, therefore, disturb errors would not occur in traditional write operations where all cells in a memory line are updated simultaneously. However, most of existing techniques that extend PCM lifetime only write cells that require their values to be updated [16][17][18][19][20][21][22][23][24][25][26][33][34][35] .…”

“…With the continuous shrinkage of cell size and the corresponding bit/word line pitches with scaling, PCM faces a non-negligible write disturb problem that is caused by thermal crosstalk between adjacent cells [29][30][31][32] . Solution techniques dealing with such a problem recently started surfacing in PCM literature.…”

“…However, the storage overhead associated with such approach is high since it uses (2,3) and (3,4) encoding for data. Cai [31] proposed a vertical constrained coding scheme in conjunction with parallel programming to mitigate thermal crosstalk in PCM. Wang et al [32] extended their earlier work in [30] by proposing a LazyCorrection and Pre-Read mechanism to minimize verification and correction overhead.…”

“…Therefore, writing a "0" is more detrimental to cell endurance than writing a "1" [27,28] . Moreover, writing a "0" may give rise to write disturb problem in PCM due to inter-cell thermal crosstalk during programming [29][30][31][32] . Write disturbs alter the content of memory cells while operating on others, thus resulting in errors in stored data.…”

Thin film ferroelectric photonic-electronic memory

“…In addition, the program/erase processes require pulse engineering, increasing the complexity of peripheral circuit design 20 . Moreover, challenges such as resistance drifting 27,28 arising from structural relaxation, as well as the thermal crosstalk 29,30 in high-density integration of the PCM memories, are yet to be solved. Another method involves the use of the oating-gate structure, where carrier injection into the oating gate changes the refractive index (RI) of the waveguide in a non-volatile way 31,32 .…”