2008
DOI: 10.1016/j.vlsi.2007.07.004
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Versatile multiplier architectures in GF(2k) fields using the Montgomery multiplication algorithm

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Cited by 23 publications
(28 citation statements)
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“…Compared to the digit serial multipliers, the versatile bit serial multipliers [15][16][17][18][19] require less area and their critical path delays are also smaller. However, they need at least m k cycles to finish the multiplication while many digit serial multipliers need approximately dm k =we cycles.…”
Section: Comparison With Other Multipliersmentioning
confidence: 99%
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“…Compared to the digit serial multipliers, the versatile bit serial multipliers [15][16][17][18][19] require less area and their critical path delays are also smaller. However, they need at least m k cycles to finish the multiplication while many digit serial multipliers need approximately dm k =we cycles.…”
Section: Comparison With Other Multipliersmentioning
confidence: 99%
“…Flexible implementations are possible with reconfigurable FPGA devices but FPGAs cannot compete with the ASIC in terms of performance, cost and power consumption. Naturally, customizable elliptic curve systems [14] and versatile multipliers [15][16][17][18][19] have been proposed in the literature but the proposed multipliers are all bit serial and there is not much work about versatile digit serial multipliers.…”
Section: Introductionmentioning
confidence: 99%
“…To clarify the timing performance of this work, we introduce the following indicator shown in the last column of Table IV (8) Our work performs best among all the scalable design in terms of total computing time elapsed, with 9.09, 4.29, 5.65 speed-up improvement when the benchmark comes to [4,5,9] respectively. One can also find that the unscalable design (HybridKara [7]) performs even better than ours (about 57% above ours from the perspective of speed-up).…”
Section: Performance and Comparisonsmentioning
confidence: 99%
“…But it should be marked that this design is defined over fixed size field F 2 233 and over fixed special form irreducible polynomials (AOL, trinomials, pentanomials), which implies that their work will be unscalable when defined over arbitrary fields. The large LUT consumption of this design compared with [4,5,9] is due to the intrinsic property of RNS parallelism, in which 8 DMMs are employed to obtain an ultimate computational capability. But for some area or power constrained applications, it is not so critically intended.…”
Section: Performance and Comparisonsmentioning
confidence: 99%
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