Verification of Static and Dynamic Barrier Synchronization Using Bounded Permissions

Le, Duy-Khanh; Chin, Wei-Ngan; Teo, Yong Meng

doi:10.1007/978-3-642-41202-8_16

Cited by 9 publications

(6 citation statements)

References 28 publications

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“…Java Phasers have similar semantics to named barriers, but are implemented in software [23]. Other (non-exhaustive) work on simple barriers such as those used for distributed programming include [2,17]. While there are some similarities, the fundamental implications of named barriers being a hardware resource instead of a software object give them a much stricter semantics which is therefore important to verify.…”

Section: Discussion and Related Workmentioning

confidence: 99%

Verification of producer-consumer synchronization in GPU programs

2015

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Previous efforts to formally verify code written for GPUs have focused solely on kernels written within the traditional data-parallel GPU programming model. No previous work has considered the higher performance, but more complex, warp-specialized kernels based on producer-consumer named barriers available on current hardware. In this work we present the first formal operational semantics for named barriers and define what it means for a warpspecialized kernel to be correct. We give algorithms for verifying the correctness of warp-specialized kernels and prove that they are both sound and complete for the most common class of warpspecialized programs. We also present WEFT, a verification tool for checking warp-specialized code. Using WEFT, we discover several non-trivial bugs in production warp-specialized kernels.

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Section: Discussion and Related Workmentioning

confidence: 99%

Verification of producer-consumer synchronization in GPU programs

2015

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“…We are not aware of automatic formal verification works other than ours (presented in Chapters 4 and 5) that focus on a dynamic synchronization construct that allows tasks to register with and deregister from the construct in runtime. Unlike [93] which proposes an approach for verifying correct synchronization of static and dynamic barriers, we focus on fully automatic verification and consider the richer and more challenging phaser construct. The work of [40] considers the dynamic verification of phaser programs and can therefore only reason about particular program inputs and runs.…”

Section: Related Workmentioning

confidence: 99%

Parameterized Verification of Synchronized Concurrent Programs

Ganjei

2021

Linköping Studies in Science and Technology. Dissertations

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I want to begin by thanking God for He has given me the opportunity and capability to reach this stage of my life. Then, I would like to offer my sincere gratitude to my advisors, Associate Professor Ahmed Rezine, Professor Petru Eles, and Professor Zebo Peng for giving me the opportunity to pursue a PhD in the Embedded Systems Lab at Linköping University, for sharing their wisdom and knowledge, and most importantly, for allowing me the room to work in my own way. I cannot thank any of my professors enough for their dedication and efforts in creating an excellent working environment. Their input, understanding, and patience have been invaluable in helping me pursue my research goals.I am especially grateful to Ahmed for his continued help and support during the whole time I was at ESLAB. I have been very fortunate to have had Ahmed as my advisor, who brightened up my academic path and supported me through each step of the way. He provided me with the necessary guidance and also ample space to improve my independent thoughts during my PhD. I would like to thank him for teaching me lessons of patience and passion for education that I will carry throughout my life's journey, making sure I was getting all the help I needed and never letting me down. I would also like to thank Professor Ludovic Henrio for his collaboration and contribution as a co-author.The ESLAB and IDA members contributed immensely to my personal and professional time as a PhD student at LiU. My profound appreciation also goes to Amir Aminifar and Breeta SenGupta for welcoming me to ESLAB and helping me take my first steps. Specifically, my most heartfelt thanks to Mina Niknafs and Åsa Kärrman, who were both my colleagues and friends.I would like to take this opportunity and extend my thanks to Professor Mariam Kamkar for all her encouragement and kindness, to the administration at IDA that facilitated my work, and especially to Anne Moe, Inger Norén, and Lene Rosell.Last but not least, I would like to express my deepest gratitude to my parents, to whom I shall always be indebted, for their unconditional love, for raising me, supporting me, but never asking me how much of my PhD was left! To my sweet and adorable little sons who brought joy and adventure vii to our family, who motivated me to take a refreshing break from my studies and contributed to the length of my PhD! To my loving, caring, and patient husband, Meysam, who has always been there for me and whose sacrifices I greatly appreciate and never forget.

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“…Saraswat and Jagadeesan [59] formalise the concurrency primitives of X10. Le et al [42] devise a verification for the correct use of a cyclic barrier in a fork/join programming language. Vasudevan et al [68] perform static analysis to improve performance of synchronisation mechanisms.…”

Section: Related Workmentioning

confidence: 99%

Dynamic Deadlock Verification for General Barrier Synchronisation

Cogumbreiro

Martins

et al. 2018

ACM Trans. Program. Lang. Syst.

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We present Armus, a verification tool for dynamically detecting or avoiding barrier deadlocks. The core design of Armus is based on phasers, a generalisation of barriers that supports split-phase synchronisation, dynamic membership, and optional-waits. This allows Armus to handle the key barrier synchronisation patterns found in modern languages and libraries. We implement Armus for X10 and Java, giving the first sound and complete barrier deadlock verification tools in these settings. Armus introduces a novel event-based graph model of barrier concurrency constraints that distinguishes task-event and event-task dependencies. Decoupling these two kinds of dependencies facilitates the verification of distributed barriers with dynamic membership, a challenging feature of X10. Further, our base graph representation can be dynamically switched between a task-to-task model, Wait-for Graph (WFG), and an event-to-event model, State Graph (SG), to improve the scalability of the analysis. Formally, we show that the verification is sound and complete with respect to the occurrence of deadlock in our core phaser language, and that switching graph representations preserves the soundness and completeness properties. These results are machine checked with the Coq proof assistant. Practically, we evaluate the runtime overhead of our implementations using three benchmark suites in local and distributed scenarios. Regarding deadlock detection, distributed scenarios show negligible overheads and local scenarios show overheads below 1.15×. Deadlock avoidance is more demanding, and highlights the potential gains from dynamic graph selection. In one benchmark scenario, the runtime overheads vary from 1.8× for dynamic selection, 2.6× for SG-static selection, and 5.9× for WFG-static selection.

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Verification of Static and Dynamic Barrier Synchronization Using Bounded Permissions

Cited by 9 publications

References 28 publications

Verification of producer-consumer synchronization in GPU programs

Verification of producer-consumer synchronization in GPU programs

Parameterized Verification of Synchronized Concurrent Programs

Dynamic Deadlock Verification for General Barrier Synchronisation

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