VEF Traces: A Framework for Modelling MPI Traffic in Interconnection Network Simulators

Energy consumption is one of the most important design parameters for future large-scale computing systems. While the end of Dennard scaling demands for increasing energy-proportional components, interconnection networks have not received much attention regarding this topic.However, these networks are expected to contribute about 20% to the overall power consumption of these systems in the near future. Furthermore, this fraction increases if other energy-proportional components, such as CPUs, accelerators, and memory, are not fully utilized.To avoid becoming the main contributor to power consumption and to reduce overall power consumption, it is mandatory to improve the energy-proportionality of interconnection networks. In this work, we analyze different aspects of energy-proportionality in interconnection networks for systems designed within current technical constraints but also for future systems that might be designed with different parameters. First, we discuss the impact of multiple design parameters and the most feasible approach for improved energy consumption, such as transition time and power state granularity. Based on this study, we introduce three different power saving policies, which try to address different requirements. While an on/off policy allows for large energy savings, it can also cause significant performance losses for adverse setups. In order to meet the demand for sustainable performance, we present two new policies that trade power saving potential for performance. For all three workload classes, we use a power-aware network simulation to report the impact on execution time and energy consumption compared to the current situation and an idealized network. While we show that a highly regular pattern enables power saving possibilities close to the theoretical minimum, even slight deviations from such a highly iterative and temporal behavior demand for further improvements in all policies. KEYWORDS energy-proportionality, interconnection networks, network simulation, power saving INTRODUCTIONToday's CMOS-based compute technology is mainly constrained by power consumption, as the scaling rules introduced by Dennard are no longer valid. Thus, in Post-Dennard performance scaling, traditional techniques like frequency scaling and an improved amount of instructions per cycle (IPC) are no longer applicable. Instead, scaling the amount of operations per Watt is key to performance. Due to data dependencies, data movement is an inherent part of scientific applications, and besides optimizing the amount of floating point or integer operations per Watt, the associated costs have to be considered when moving input and output operands. Furthermore, energy consumption for data movements strongly depends on distance: for short on-die links, power consumption depends linearly on the transmission distance, while for longer connections, it quickly behaves super-linear due to effects including dielectric loss and skin effect. As a result, for a clustered system, inter-node communication significantly contr...

Section: Evaluation Methodologymentioning

confidence: 99%

Section: Tracesmentioning

confidence: 99%

See 1 more Smart Citation

On link width scaling for energy‐proportional direct interconnection networks

Zahn

Lammel

Fröning

2018

“…Such options are not feasible for the Graph500 benchmark, because the core interest of the network simulation requires the graph traversal and presents similar memory restrictions to the simulation of the whole application. Trace‐driven simulators, such as Dimemas, Netrace, or the VEF framework, fail to accurately represent the dependencies in the execution. Additionally, the size of traces from data‐intensive applications is too big and increases with the number of processes.…”

Section: Related Workmentioning

confidence: 99%

A scalable synthetic traffic model of Graph500 for computer networks analysis

Fuentes

Benito

Vallejo

et al. 2017

SUMMARYThe Graph500 benchmark attempts to steer the design of High-Performance Computing systems to maximize the performance under memory-constricted application workloads. A realistic simulation of such benchmarks for architectural research is challenging due to size and detail limitations. By contrast, synthetic traffic workloads constitute one of the least resource-consuming methods to evaluate the performance. In this work, we provide a simulation tool for network architects that need to evaluate the suitability of their interconnect for BigData applications. Our development is a low computation-and memory-demanding synthetic traffic model that emulates the behavior of the Graph500 communications, and is publicly available in an open-source network simulator. The characterization of network traffic is inferred from a profile of several executions of the benchmark with different input parameters. We verify the validity of the equations in our model against an execution of the benchmark with a different set of parameters. Furthermore, we identify the impact of the node computation capabilities and network characteristics in the execution time of the model in a Dragonfly network.

“…In this section, we use an open access trace‐driven traffic model, called VEF trace model,() to evaluate the 5DT torus performance. Using modified MPI libraries, we capture the MPI traffic injected by parallel applications in a trace file, which will be used later for generating the network workload.…”

Section: Performance Evaluationmentioning

confidence: 99%

Constructing virtual 5‐dimensional tori out of lower‐dimensional network cards

Andújar

Villar

Sánchez

et al. 2017

Self Cite

In the Top500 and Graph500 lists of the last years, some of the most powerful systems implement a torus topology to interconnect the millions of computing nodes they include. Some of these torus networks are of five or six dimensions, which implies an additional difficulty as the node degree increases. In previous works, we proposed and evaluated the nD Twin (nDT) torus topology to virtually increase the dimensions a torus is able to implement. We showed that this new topology reduces the distances between nodes, increasing, therefore, global network performance. In this work, we present how to build a 5DT torus network using a specific commercial 6-port network card (EXTOLL card) to interconnect those nodes. We show, using the same number of cards, that the performance of the 5DT torus network we are able to implement using our proposal is higher than the performance of the 3D torus network for the same number of compute nodes.