Vedivision – A Fast Bcd Division Algorithm Facilitated by Vedic Mathematics

Sengupta, Diganta; Sultana, Mahamuda; Chaudhuri, Atal

doi:10.5121/ijcsit.2013.5405

Cited by 3 publications

(8 citation statements)

References 4 publications

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“…The accuracy of the initial linear approximation is determined by the number of Newton Raphson iterations which in turn is dictated by the look up table bucketing the slope and intercept approximations. In [42] and [43], the initial approximation of the reciprocal is obtained using a piecewise first order minimax polynomial [44] The next section presents the algorithms using the two Vedic sutras -Nikhilam and Paravartya, followed by the Vedivision algorithm of [3].…”

Section: Related Workmentioning

confidence: 99%

“…This section presents the two Vedic sutras which have been used to design the generic algorithm Vedivision [3].…”

Section: Division Algorithms Based On Nikhilam and Paravartya Sumentioning

confidence: 99%

“…Software implementation for division using Vedic sutras has been observed in [1] [2] [3] [4]. We provide a hardware realization for the Vedivision Algorithm presented in [3]. The algorithm is generic and consists of contribution from two sutras from Vedic Mathematicsthe Nikhilam and the Paravartya sutras.…”

Section: Introductionmentioning

confidence: 99%

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Radix-10 Fixed Point Division Hardware

Sengupta*¹,

Sultana²,

Chaudhuri³

2019

IJRTE

Self Cite

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Standardization of decimal floating-point formats by IEEE in IEEE 754-2008 Standards fuelled the interest on decimal floating-point architectures among the global research community. Although decimal arithmetic architecture research attracted computer scientists for the last two decades, the major thrust was observed past the year 2008. Multiple proposals have been witnessed for decimal arithmetic units, mostly adders/subtractors, and multipliers. Very few designs have been proposed in the division domain. This article proposes decimal division hardware based on sutras from Vedic Mathematics, the ancient mathematics system. We present a Reduced Magnitude Divisor Generator which converts each digit of the actual divisor into a reduced digit set [-5, 5] using a unique combination/modification of the Vedic Sutras. The divisor digit magnitude reduction also minimizes the product set of multiplication as the single-digit multiplier belongs to the reduced digit set [0, 5] barring the sign. The sign of the dividend or the divisor is not attended during division as a simple XOR operation on the two signs provides the sign of the quotient. Peer comparison has exhibited better results for our design in terms of space and time.

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Section: Related Workmentioning

confidence: 99%

“…This section presents the two Vedic sutras which have been used to design the generic algorithm Vedivision [3].…”

Section: Division Algorithms Based On Nikhilam and Paravartya Sumentioning

confidence: 99%

See 1 more Smart Citation

Radix-10 Fixed Point Division Hardware

Sengupta*¹,

Sultana²,

Chaudhuri³

2019

IJRTE

Self Cite

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show abstract

“…The sutra can be very efficaciously applied in multiplication of numbers, which are nearer to basis like 10, 100, 1000 hence, to the power of 10 [1]. The procedure of multiplication using the Nikhilam involves minimum number of steps, space, time saving and need only intellectual calculation.…”

Section: Bnikhilam Navatascaramam Dastahmentioning

confidence: 99%

“…This sutra contains a brief and incomplete summary of the math shortcuts in which the divisor is more than one digit and slightly higher than a power of 10. It can also used for numbers slightly higher than 100, 1000 and etc [1].…”

Section: Fig 2 Example For Nikhilam Sutramentioning

confidence: 99%

Survey on Performance of Vedic Multiplier

Elakkiya¹,

Mathan²

2015

International Journal of Advanced Research in Computer and Comm

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Abstract:It is important to develop a high-performance multiplier architecture to meet the requirements of real-time, low power, low cost and small area in different applications. Vedic multiplier is one such promising solution and its simple architecture coupled with increased speed forms an unparalleled combination for serving any complex multiplication computations. In this paper various types of Vedic sutras are discussed and extensive survey on features of the Vedic multiplier design were reported.

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Vedic Sutras

Sengupta¹,

Chaudhuri

2016

Handbook of Research on Natural Computing for Optimization Problems

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Any arithmetic operation roots down to the four elementary processes, namely addition, subtraction, multiplication and division. Of these four, multiplication and division happen to be highly resource intensive in terms of memory requirement and execution time. It has been evolved that available ancient Vedic sutras for solving complex arithmetic operations when reorganized as computer algorithms provide a paradigm shift in both memory requirement and speed. Our proposed Vedic sutra based algorithms handle decimal number system instead of conventional binary numbers which eliminates BCD to binary conversion and vice versa, further accelerating the desired process. This chapter focuses primarily on a few Vedic Sutras and their effectiveness in optimizing BCD multiplication and BCD division and also provides substantial statistical data in support.

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Vedivision – A Fast Bcd Division Algorithm Facilitated by Vedic Mathematics

Cited by 3 publications

References 4 publications

Radix-10 Fixed Point Division Hardware

Radix-10 Fixed Point Division Hardware

Survey on Performance of Vedic Multiplier

Vedic Sutras

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