VCII‐Based Immittance Simulators: Generalized Parallel Configurations

Abstract

In this paper, four new generalized configurations of grounded parallel‐type immittance simulators are proposed. These circuits implement parallel resistor–inductor (RL), parallel resistor–capacitor (RC), parallel capacitor–frequency‐dependent negative resistance (CD), and capacitance multiplier configurations utilizing only two second‐generation voltage conveyors (VCII±) as active elements along with three impedances, without the need for specific matching conditions. The applicability of the proposed parallel RL and capacitance multiplier configurations as a second‐order high‐pass filter (HPF) and a first‐order low‐pass filter (LPF), respectively, is also demonstrated. These applications illustrate the versatility and utility of the proposed structures. Frequency, transient, and Monte Carlo analysis utilizing the CMOS VCII± in the SPICE simulation tool have also been performed to validate the feasibility of the presented circuits. Further validation is carried out through layout design in Cadence Virtuoso, employing 0.18‐μm CMOS technology. Both presimulation and postsimulation results are presented for a thorough assessment of the proposed circuits. Also, the claimed theory is verified by experimental results based on the VCII implementation with commercially available IC AD844.