VC-1 video decoder optimization on ARM Cortex-A8 with NEON

Abstract. This paper analyses possibility of implementation of stereo matching algorithms on ARM based processors with special attention on the final algorithm performance. Semi global block matching and Block matching algorithms were chosen as a base of this research. First, the technologies used in the implementation are described, then the optimization approach is discussed. The main part of this paper deals with algorithms performance depending on the chosen optimization.

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“…The second option is to use inline assembly and write algorithm (or parts of it) directly in assembly. [6,7] …”

Section: Simd Parallelizationmentioning

confidence: 99%

Implementation and Optimization of Stereo Matching Algorithm on ARM Processors

Janku

Došek

Dulík

2015

Advances in Intelligent Systems and Computing

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“…There are several works on acceleration of H.264 [1] and VC-1 [2] decoder by utilizing SIMD capability of ARM NEON platform. In our previous work, we use the similar strategy to accelerate AVS decoder [3], but HD video can't still be decoded in real-time only by this kind of acceleration.…”

Section: Introductionmentioning

confidence: 99%

High definition IEEE AVS decoder on ARM NEON platform

Wang

Wan

Wang

et al. 2013

2013 IEEE International Conference on Image Processing

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Nowadays, mobile devices are capable of displaying video up to HD resolution. In this paper, we propose two acceleration strategies for Audio Video coding Standard (AVS) software decoder on multi-core ARM NEON platform. Firstly, data level parallelism is utilized to effectively use the SIMD capability of NEON and key modules are redesigned to make them SIMD friendly. Secondly, a macroblock level wavefront parallelism is designed based on the decoding dependencies among macroblocks to utilize the processing capability of multiple cores. Experiment results show that AVS (IEEE 1857) HD video stream can be decoded in real-time by applying the proposed two acceleration strategies.

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“…There are several related works on acceleration of H.264 [3] and VC-1 [4] decoder by utilizing SIMD capability of ARM NEON platform. In our previous work, we use the similar strategy to accelerate AVS decoder [5].…”

Section: Introductionmentioning

confidence: 99%

Acceleration of HEVC transform and inverse transform on ARM NEON platform

Hui

Wang

et al. 2013

2013 International Symposium on Intelligent Signal Processing and Communication Systems

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HEVC (High Efficiency Video Coding) has recently been published as the next generation video coding standard. Compared with previous standards, the coding efficiency is greatly improved at the cost of much higher codec complexity. On the other hand, ARM with SIMD (Single Instruction Multiple Data) instructions is widely deployed on mobile platform, which makes it feasible to accelerate multimedia applications by software. However, the accelerations are not straight forward, and the modules have to be carefully redesigned to utilize SIMD instructions efficiently. Transform and inverse transform modules are frequently called in HEVC codec. In this paper, we propose an acceleration method of the transform and inverse transform by utilizing the data level parallelism on NEON platform. Experiment results show that the speed of these modules has been increased considerably.

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VC-1 video decoder optimization on ARM Cortex-A8 with NEON

Cited by 4 publications

References 1 publication

Implementation and Optimization of Stereo Matching Algorithm on ARM Processors

Implementation and Optimization of Stereo Matching Algorithm on ARM Processors

High definition IEEE AVS decoder on ARM NEON platform

Acceleration of HEVC transform and inverse transform on ARM NEON platform

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