2016 28th International Symposium on Power Semiconductor Devices and ICs (ISPSD) 2016
DOI: 10.1109/ispsd.2016.7520821
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Various structures of 1200V SiC MPS diode models and their simulated surge current behavior in comparison to measurement

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Cited by 27 publications
(14 citation statements)
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“…It was noticed that Device 1 has the thinnest substrate and the smallest chip size. It also has additional large P+ regions placed periodically in the active region, which is reported to be able to improve the device’s high current conduction performance [ 27 , 35 ].…”
Section: Methodsmentioning
confidence: 99%
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“…It was noticed that Device 1 has the thinnest substrate and the smallest chip size. It also has additional large P+ regions placed periodically in the active region, which is reported to be able to improve the device’s high current conduction performance [ 27 , 35 ].…”
Section: Methodsmentioning
confidence: 99%
“…Moreover, since the junction temperature is a critical variable in the surge process, a good knowledge of it is necessary to investigate device surge capabilities. Unfortunately, the junction temperature is not a directly measurable physical quantity, and usually indirect measurement and simulation should be used [ 10 , 27 , 28 , 29 ]. Considering that the surge current phenomenon is a complicated electro-thermal coupled process, such simulations often tend to be extremely time- consuming.…”
Section: Introductionmentioning
confidence: 99%
“…Therefore, the Mo-based Schottky metal work function is defined − = 4.53 [49], which results in a SBH value for electrons similar to measured ones [58]. The blocking voltage layer is 11μm thick and of 1.2x10 16 cm -3 nitrogen (N) doping density [59]. The substrate thickness was defined 110μm which corresponds to Infineon's thinQ!…”
Section: H-sic Epimentioning
confidence: 99%
“…The active area of the device was calculated to be 0.029 cm 2 . The calculation makes use of the Current density -Voltage measurements (J-V) of a similar 1.2kV power diode with 10A rated available in [59], which in turn can be correlated with information from [60] and our own measurements. It also assumes a honeycomb layout design [61].…”
Section: H-sic Epimentioning
confidence: 99%
“…The MPS concept was implemented and investigated for SiC-based devices [32][33][34][35][36][37][38]; however, there have been only a few reports about GaN-based MPS [39][40][41]. The early MPS work used a Si+ ion implantation technique to form n-type regions inside p-epi layers on free-standing GaN substrates, and the MPS appeared to be a smooth surface [40].…”
Section: Introductionmentioning
confidence: 99%