Vapour Pressure Modelling for Plastic Encapsulated Microelectronics Subjected to Lead‐Free Solder Reflow Profile

Abstract

A universal, practical vapour pressure modelling scheme for the plastic encapsulated microelectronics (PEMs) subjected to lead‐free solder reflow profile and other high temperature conditions is presented. The proposed technique employs finite‐element moisture diffusion and structural analysis to calculate the dynamic vapour pressure buildups at the interfacial delaminations in the PEMs. The modelling scheme uses a non‐iterative approach, and it is capable of accurately and efficiently determining the dynamic vapour pressure information required for the reliability‐related design and failure analysis of various kinds of PEMs. The modelling scheme has considerable value to the development of new materials, innovative structures, and effective protection methods for enhancing the performance and reliability of plastic packages.

Advancement in modeling vapor pressure induced stresses in electronic packaging

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