UVM Verification IP for AXI

Melikyan, Vazgen; Harutyunyan, Stepan; Kirakosyan, Artak; Kaplanyan, Taron

doi:10.1109/ewdts52692.2021.9580997

Cited by 14 publications

(2 citation statements)

References 6 publications

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“…This is known as a request. The data is transferred between Manager and Subordinate using either: a) A write data channel to transfer data from the Manager to the Subordinate [5]. In a write transaction, the Subordinate uses the write response channel to signal the completion of the transfer to the Manager [6].…”

Section: Design and Implementationmentioning

confidence: 99%

Design and Implementation of Advanced Extensible Interface using Verilog

B R,

K B

2023

IJRASET

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Advanced eXtensible Interface, is an interface protocol defined by ARM as part of the AMBA standard. They comprise of AXI4, AXI4 Lite, AXI4 Stream. The AXI specification describes a point-to-point protocol between two interfaces, a master and a slave. The AXI protocol uses 5 channels, 2 for read transactions and 3 for write transactions. One of the key features of AXI4 is its support for burst transactions, which allows for efficient transfer of multiple data items in a single transaction, enhancing data throughput. AXI4-Lite is designed to provide a lightweight and efficient interface for communication between a master device and simpler peripheral devices or memory-mapped registers in a digital system. AXI4-Stream is developed for highthroughput, unidirectional data transfer between different components in a digital system. The design is done in Verilog.

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Section: Design and Implementationmentioning

confidence: 99%

Design and Implementation of Advanced Extensible Interface using Verilog

B R,

K B

2023

IJRASET

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“…The network response is examined based on the technique and error kind. Any AXI device may be tested using the structure of the verification framework presented in Paper [5] for the AMBA AXI interface. To verify whether the verification method includes all potential circumstances, a functional completeness model was created.…”

Section: Literature Surveymentioning

confidence: 99%

High Secure Data Transactions in AXI System Bus using Firewall Protection

2023

IJRASET

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An open-standard, on the chip interconnection protocol called the Advance Microcontroller Bus Architecture (AMBA) is used to link and manage functional blocks in systems on chip (SoC) architectures. An interface definition called Advanced eXtensible Interface (AXI) specifies the IP block interface rather than the connection itself. The point-to-point connections between a supervisor as well as subordinate are defined by the AXI protocol in terms of their signals and time. The existing AXI protocol only has the response mechanism for the slave error and the valid transactions. In this work the high secure data transactions in AXI system bus is introduced using the firewall protection where a certain range of address are protected to access from other master peripherials

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Design of High-performance Heterogeneous Integrated Circuits

Melikyan

2023

Machine Learning-Based Design and Optimization of High-Speed Circuits

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UVM Verification IP for AXI

Cited by 14 publications

References 6 publications

Design and Implementation of Advanced Extensible Interface using Verilog

Design and Implementation of Advanced Extensible Interface using Verilog

High Secure Data Transactions in AXI System Bus using Firewall Protection

Design of High-performance Heterogeneous Integrated Circuits

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