Utilizing Process Variations for Reference Generation in a Flash ADC

Abstract

This brief presents an experimental study on how to take advantage of the increasing process variations in nanoscale CMOS technologies to achieve small and low-power high-speed analog-to-digital converters (ADCs). Particularly, the need for a reference voltage generation network has been eliminated in a 4-bit Flash ADC in 90-nm CMOS, with small-sized comparators. The native comparator offsets, resulting from the processvariation-induced mismatch, are used as the only source of reference levels, and redundancy is used to acquire the desired resolution. The measured performance of the 1.5-GS/s ADC is comparable to traditional state-of-the art ADCs and dissipates 23 mW.Index Terms-Flash analog-to-digital converter (ADC), highperformance design, parameter variation.

Achieving Energy Efficiency in Analogue and Mixed Signal Integrated Circuit Design

“…Another example is a Flash ADC using process variations to generate the input references from random comparators offsets (Sundström & Alvandpour, 2009), whose resolution and input signal range are optimized by means of digital calibration.…”

A Multistage Architecture for Statistical Inference with Stochastic Signal Acquisition

“…Other recent work has directly leveraged the offset statistics rather than compensating for them. In [6], many comparators were produced with intentionally large variations and only a few were chosen to create a reference ladder. The comparators in [7] were also designed to be highly variable, but the true levels were not measured; instead, the outputs were averaged to produce an estimate based on the offset statistics.…”

A low complexity estimation architecture based on noisy comparators

“…There have been some proposals in the circuits literature to use these low-power, unreliable comparators for quantization by incorporating digital logic into the architecture. If the offsets do not vary with time, then the switching levels can be measured [6], calibrated with trim currents [7], or reassigned [8]. These calibration methods are designed to suppress the uncertainty in switching levels.…”