Using SAT-based techniques in power estimation

Abstract

Recent algorithmic advances in Boolean satisfiability (SAT), along with highly efficient solver implementations, have enabled the successful deployment of SAT technology in a wide range of applications domains, and particularly in electronic design automation (EDA). SAT is increasingly being used as the underlying model for a number of applications in EDA. This paper describes how to formulate two problems in power estimation of CMOS combinational circuits as SAT problems or 0-1 integer linear programming (ILP). In these circuits, it was proven that maximizing dissipation is equivalent to maximizing gate output activity, appropriately weighted to account for differing load capacitances. The first problem in this work deals with identifying an input vector pair that maximizes the weighted circuit activity. In the second application we attempt to find an estimate for the maximum power-up current in circuits where power cut-off or gating techniques are used to reduce leakage current. Both problems were successfully formulated as SAT problems. SAT-Based and generic Integer Linear Programming (ILP) solvers are then used to find a solution. The experimental results obtained on a large number of benchmark circuits provide promising evidence that the proposed complete approach is both viable and useful and outperforms the random approach. r

Symmetry in Boolean Satisfiability

“…Besides verification, SAT has also been heavily applied in automatic test pattern generation (ATPG) [ 19] and extended to delay fault testing [ 20]. SAT has also been used in FPGA routing [ 2], global routing [ 21], logic synthesis [ 22], cross talk noise analysis [ 23], power estimation [ 3], and power leakage estimation [ 24].…”

“…This is mainly due to the fact that SAT algorithms have seen tremendous improvements in the last few years, allowing larger problem instances to be solved in different application domains. Such applications include formal verification [ 1], FPGA routing [ 2], power estimation [ 3], fault tolerance [ 4], network assignments [ 5], wireless communications [ 6], and scheduling [ 7]. SAT has also been extended to a variety of applications in Artificial Intelligence, including other well-known NP-complete problems.…”

Low power state assignment using ILP techniques

“…This is mainly due to the fact that SAT algorithms have seen tremendous improvements in the last few years, allowing larger problem instances to be solved in different applications domains [5,8,22,27]. Such applications include formal verification [9], FPGA routing [23], global routing [4], logic synthesis [21], and power optimization [28].…”

A Multipath Detection Scheme Using Sat

“…Such applications include: FPGA routing [9] and Power Optimization [3,10]. SAT has also been extended to a variety of applications in Artificial Intelligence including other well known NP-complete problems such as graph colorability, vertex cover, hamiltonian path, and independent sets [6].…”